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General Design description
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 MicroBlaze MicroBlaze Design with  HyperRAM memory test example.

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1. Connect JTAG and power on PCB
2. (if not done) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd" or open with "vivado_open_project_guimode.cmd", if generated.
3. Open Vivado HW Manager
4. Program Bitfile

Usage

1. Prepare HW like described on section Programming
2. Connect UART USB (most cases same as JTAG)
3. Power On PCB (Do not restart, if you use Bitfile programming)
   Note: FPGA Loads Bitfile from Flash

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