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Name / opt. VHD NameDirectionPinBank PowerDescription
FTDI_RXDin

UART receive data from FTDI
FTDI_TXDout

UART transmit data to FTDI
MIO22out

UART receive data to FPGA
MIO23in

UART receive data from FPGA
ZYNQ_TDOin

FPGA JTAG TDO
ZYNQ_TCKout

FPGA JTAG TCK
ZYNQ_TDIout

FPGA JTAG TDI
ZYNQ_TMSout

FPGA JTAG TMS
ADBUS0in

FTDI JTAG TCK
ADBUS1in

FTDI JTAG TDI
ADBUS2out

FTDI JTAG TDO
ADBUS3in

FTDI JTAG TMS
USB_BTNin

Front panel button
LED4out

Front panel LED4
MRout

Supervisor Reset output
SRST_Bout

FPGA SRST_B
FTDI_RSTout

FPGA RST_B
PLL_RSTout

Clock chip Reset
EN_DAC1out

DAC1 Power Enable
EN_DAC2out

DAC2 Power Enable
EN_DAC3out

DAC3 Power Enable
EN_DAC4out

DAC4 Power Enable
EN_FPDout

FPD Power Enable
EN_LPDout

LPD Power Enable
EN_DDRout

DDR Power Enable
EN_PSGTout

PSGT Power Enable
ON_GT_Lout

GT_L Power Enable
ON_GT_Rout

GT_R Power Enable
PG_PSGTin

PSGT Power Good
LP_GOODin

LP Power Good
PG_GT_Lin

GT_L Power Good
PG_GT_Rin

GT_R Power Good
PG_PLin

PL Power Good
PG_DDRin

DDR Power Good
F1PWMout

FAN PWM Control
F1SENSEin

FAN Sense
DONEin

FPGA DONE
IO1in

FPGA I2C SCL_t
IO2out

FPGA I2C SCL_i
IO3in

FPGA I2C SDA_t
IO4out

FPGA I2C SDA_i
IO5in

FPGA User LED control
SCL_Rout

SCL Strong Pull-Up Enable
SDA_Rout

SDA Strong Pull-Up Enable
SCLinout

I2C SCL
SDAinout

I2C SDA


Functional Description

SC to HD-IO Bank Interface

SC I/O #FunctionFPGA IO
IO1SCL OUTG18
IO2SCL ING19
IO3SDA OUTK18
IO4SDA INH19
IO5EN PULLUPSUser LEDJ171 will enable strong pullups on SMBus SDA/SCLDrive SC LED, if configured in "Control Register"
IO6-H17
IO7-H18
IO8-L18
IO9-L17
IO10-K17

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