Page History
...
Name / opt. VHD Name | Direction | Pin | Bank Power | Description |
---|---|---|---|---|
ADBUS0 | in | G9 | 3V_D | FTDI TCK |
ADBUS1 | in | F10 | 3V_D | FTDI TDI |
ADBUS2 | out | E10 | 3V_D | FTDI TDO |
ADBUS3 | in | D9 | 3V_D | FTDI TMS |
AVDD_SHDN | - | G10 | 3V_D | |
BCBUS0 | - | D12 | 3V_D | |
BCBUS1 | - | E13 | 3V_D | |
BCBUS2 | - | E12 | 3V_D | |
BCBUS3 | - | F13 | 3V_D | |
BCBUS4 | - | F12 | 3V_D | |
BDBUS0 | - | B11 | 3V_D | |
BDBUS1 | - | A12 | 3V_D | |
BDBUS2 | - | B12 | 3V_D | |
BDBUS3 | - | C11 | 3V_D | |
BDBUS4 | - | B13 | 3V_D | |
BDBUS5 | - | C12 | 3V_D | |
BDBUS6 | - | C13 | 3V_D | |
BDBUS7 | - | D11 | 3V_D | |
CONF_DONE | - | C5 | 3V_D | |
DET_BPR | - | H2 | 3V_D | |
DET_RIO | - | H3 | 3V_D | |
DONE | in | N3 | PS_1V8 | FPGA Done |
EN_3V3 | out | C10 | 3V_D | 3.3V Power Enable |
EN_DAC1 | out | E6 | 3V_D | DAC1 Power Enable |
EN_DAC2 | out | E8 | 3V_D | DAC2 Power Enable |
EN_DAC3 | out | B6 | 3V_D | DAC3 Power Enable |
EN_DAC4 | out | A6 | 3V_D | DAC4 Power Enable |
EN_DDR | out | G13 | 3V_D | DDR Power Enable |
EN_FPD | out | L12 | 3V_D | FPD Power Enable |
EN_LPD | out | J13 | 3V_D | LPD Power Enable |
EN_PSGT | out | B9 | 3V_D | PSGT Power Enable |
ERRERR_OUT | - | G5 | PS_1V8 | |
ERR_STATUS | - | H6 | PS_1V8 | |
F_TCK | out | N2 | PS_1V8 | FPGA TCK |
F_TDI | out | M1 | PS_1V8 | FPGA TDI |
F_TDO | in | K1 | PS_1V8 | FPGA TDO |
F_TMS | out | J1 | PS_1V8 | FPGA TMS |
F1PWM | out | H10 | 3V_D | FAN PWM Control |
F1SENSE | in | J9 | 3V_D | FAN Sense |
FTDI_RST | out | E9 | 3V_D | FTDI Reset |
GA0 | - | F8 | 3V_D | |
GA0_R | - | F9 | 3V_D | |
GA1 | - | A2 | 3V_D | |
GA1_R | - | B2 | 3V_D | |
GA2 | - | A3 | 3V_D | |
GA2_R | - | B3 | 3V_D | |
GA3 | - | A4 | 3V_D | |
GA3_R | - | B4 | 3V_D | |
IEEE_SW_NC | - | C9 | 3V_D | |
IEEE_SW_NO | - | A11 | 3V_D | |
INIT_B | in | L2 | PS_1V8 | FPGA Init |
JTAGEN | - | E5 | 3V_D | |
LED_FP_4 | out | M4 | 3.3V | Front panel LED |
LP_GOOD | in | H13 | 3V_D | LP Power Good |
M10_RST | - | A7 | 3V_D | |
M10_RX | - | C2 | 3V_D | |
M10_TX | - | B1 | 3V_D | |
MAX_IO1 | in | N8 | 3.3V | I²C SCL in |
MAX_IO10 | - | M10 | 3.3V | |
MAX_IO2 | out | N7 | 3.3V | I²C SCL out |
MAX_IO3 | in | M9 | 3.3V | I²C SDA in |
MAX_IO4 | out | M8 | 3.3V | I²C SDA out |
MAX_IO5 | in | M12 | 3.3V | User LED in |
MAX_IO6 | - | M13 | 3.3V | |
MAX_IO7 | - | N9 | 3.3V | |
MAX_IO8 | - | N10 | 3.3V | |
MAX_IO9 | - | M11 | 3.3V | |
MIO22 | out | M3 | PS_1V8 | UART out |
MIO23 | in | M2 | PS_1V8 | UART in |
MIO24 | - | L3 | PS_1V8 | |
MIO25 | - | H5 | PS_1V8 | |
MR | out | K10 | 3V_D | Supervisor Reset out |
N.C. | - | J5 | 3.3V | |
N.C. | - | J6 | 3.3V | |
N.C. | - | J7 | 3.3V | |
N.C. | - | J8 | 3.3V | |
N.C. | - | K5 | 3.3V | |
N.C. | - | K6 | 3.3V | |
N.C. | - | K7 | 3.3V | |
N.C. | - | K8 | 3.3V | |
N.C. | - | L4 | 3.3V | |
N.C. | - | L5 | 3.3V | |
N.C. | - | M5 | 3.3V | |
N.C. | - | M7 | 3.3V | |
N.C. | - | N4 | 3.3V | |
N.C. | - | N5 | 3.3V | |
N.C. | - | N6 | 3.3V | |
N.C. | - | L10 | 3.3V | |
N.C. | - | L11 | 3.3V | |
N.C. | - | N12 | 3.3V | |
nCONF | - | E7 | 3V_D | |
nSTATUS | - | C4 | 3V_D | |
ON_GT_L | out | J12 | 3V_D | GT_L Power Enable |
ON_GT_R | out | K12 | 3V_D | GT_R Power Enable |
PG_DDR | in | H8 | 3V_D | DDR Power Good |
PG_GT_L | in | H9 | 3V_D | GT_L Power Good |
PG_GT_R | in | G12 | 3V_D | GT_R Power Good |
PG_PL | in | L13 | 3V_D | PL Power Good |
PG_PSGT | in | K11 | 3V_D | PSGT Power Good |
PLL_RST | out | K2 | PS_1V8 | PLL Chip Reset |
PROG_B | out | J2 | PS_1V8 | FPGA PROG_B |
PSON | - | D6 | 3V_D | |
RP_SCL | - | E1 | 3V_D | |
RP_SDI | - | G4 | 3V_D | |
RP_SDO | - | F4 | 3V_D | |
RP_SL | - | F1 | 3V_D | |
RST | - | B5 | 3V_D | |
RST_PRST | - | A8 | 3V_D | |
RST_PRST_R | - | B10 | 3V_D | |
RST_R | - | D8 | 3V_D | |
SATA_SCL | - | G2 | 3V_D | |
SATA_SDI | - | F6 | 3V_D | |
SATA_SDO | - | F5 | 3V_D | |
SATA_SL | - | G1 | 3V_D | |
SMB_SCL | inout | E3 | 3V_D | I²C SCL |
SMB_SCL_R | out | E4 | 3V_D | I²C SCL Pullup Enable |
SMB_SDA | inout | C1 | 3V_D | I²C SDA |
SMB_SDA_R | out | D1 | 3V_D | I²C SDA Pullup Enable |
SRST_B | out | H4 | PS_1V8 | FPGA SRST_B |
SW4 | in | A5 | 3V_D | Dip Switch |
SYSEN | - | D7 | 3V_D | |
USR_BTN | in | J10 | 3V_D | Front pannel button |
WAKE | - | A9 | 3V_D | |
WAKE_R | - | A10 | 3V_D |
Functional Description
Power
...
Overview
Content Tools