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The project wizard of Quartus lite lite guides through the setup of a project.
Before using it, it is suggested to create a folder for the project project directory for storing it via a file browser.
Quartus lite does not create a folder for you. The generation of the bootloaders requires a
SoC EDS Shell with root privileges on a windows systems. Their file system access
is limited to the C drive. Therefore for Windows users it is best practice for Windows users to store the project
on the C drive.
In essence, the project setup consists of naming and placing it, pointing to the project directory, naming the project,
and adding a device to it.
This guide uses the folder Project and the project itself is named HPSexample.
The steps in detail:
File → New Project Wizard ... setup Setup the path to the project directory and name the project, click next.
In the following two windows - Project Type - and - Add Files - is nothing further required other
than clicking next Next.
In the next window - Family, Device & Board Settings - it is required to select either a
FPGA Device or a Board from the List.
Copy 5CSEMA5F31C8(N) into the field Name filter , this reduces the Device list, and select it in the list.
In the window EDA Tool Settings just click next Next and finish Finish in the following window - Summary.
Quartus places the folder db, two files HPSexample.qpf and HPSexample.qsf into the project folder
and the setup is accomplished.
Plattform Designer
File → New → Qsys System File
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AXI Bridges
FPGA-to-HPS interface width: unused
HPS-to-FPGA interface width: unused
Lightweight HPS-to-FPGA interface width: unused
Tab Peripheral Pins:
Quad SPI Flash Controller - QSPI pin: HPS I/O Set 0
SD/MMC Controller - SDIO pin: HPS I/O Set 0 - SDIO mode: 4-bit Data
USB Controllers
SPI Controllers
UART Controllers - UART0 pin: HPS I/O Set 0 - UART0 mode: no Flow Control
I2C Controllers - I2C0 pin: HPS I/O Set 1 - I2C1 pin: HPS I/O Set 0
Can Controllers
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Tab SDRAM - Subtask - Memory Timing:
tIS (base): 180 ps ps tIH (base): 140 ps tDS (base) 30 ps tDH (base): 65 ps
tDQSQ: 100 ps ps tQH 0.38 cycles cycles tDQSCK_ 225 ps
tDQSS: 0.27 cycles cycles tQSH: 0.4 cycles cycles tDSH:0.18 cycles tDSS: 0.18 cycles
tINIT: 500 us tMRD (tMRW): 4 cycles
tRAS: 35.0 ns ns tRCD: 13.75 ns ns tRP: 13.75 ns tREFI (tREFIab): 7.8 us tRFC (tRFCab): 350.0 ns tWR: 15.0 ns
tWTR: 4 cycles cycles tFAW: 40 ns ns tRRD: 12.0 ns tRTP: 12.0 n
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