Note |
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Direct SPI configuration is supported only up to Xilinx iMPACT version 11.x. See Xilinx AR#36156. Available only for TE0300 (through J3 SPI interface) and TE0320 (through B2B connection). |
Info |
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For further information about direct (pure SPI) in-system programming of SPI Flash memories, please see Xilinx Application Note XAPP951 "Configuring Xilinx FPGAs with SPI Serial Flash". |
You must follow the procedure below.
Make sure that reset swith is enabled:
Connect the host computer to the micromodule through both the SPI flying leads cable and the USB cable.
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Switch S2 Move Master Reset switch back to the "Run" position. Make sure that reset swith is disabled:
In case you uploaded the test design, you should see the on-board led blinking at 0.5 Hz.