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Interface Available

The controller uses 4 interfaces (see here):

• USB interface (to USB connector): connection with the host computer;
• I²C interface (to EEPROM): the I²C interface connects the USB controller to the EEPROM chip, which stores vendor ID and device ID and the USB firmware. See chapter DIP Switch for available options.
• SPI interface (to FPGA and Flash): the SPI interface is used to communicate with the FPGA and to access the SPI serial Flash chip. The SPI interface allows a medium-fast (1-2 minutes), frequent and non-volatile configuration (SPI Flash bitstream download) through TE USB FX2 microcontroller and OpenFutNet;
• FIFO interface (to FPGA): the FIFO interface provides a high-speed communication channel with the FPGA.The interface can transfer up to 48 MB/s burst rate.

Jtag Interface

The JTAG interface allows a

• fast (10 seconds), frequent but volatile configuration (only the FPGA is programmed using Xilinx ISE or EDK and a .bit bitstream and not the SPI Flash) of the TE USB FX2 module.
• medium-fast (1-2 minutes) non-volatile on-site operations such as SPI Flash bitstream download: indirect SPI in-system programming (ISP).

Only through the JTAG interface it is possible to develop and debug with Xilinx tools (e.g. Xilinx SDK debug,Xilinx ChipScope, Xilinx Microprocessor Debugger).