Page History
...
| Component | Designator | Pin Name | Pin Number | Board | Interface | Connected in the Hardware with | Designator | Pin Name | Pin Number | Board | after programming the FPGA connected with | Designator | Pin Name | Pin Number | Board |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dip Switch | S1-3 | ---CPLD_IO2 | --- | TEB0835 | B2B | CPLD | U31 | CPLD_IO2 | 40 | TE0835 | FPGA | U1 | FPGA_IO1 | AE16 | TE0835 |
| FPGA | U1 | FPGA_IO0 | AE18 | TE0835 | --- | CPLD | U31 | FPGA_IO0 | 27 | TE0835 | LED | D1 | --- | --- | TE0835 |
...
Overview
Content Tools