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The I/O signals are routed from the SoC's PL banks as LVDS-pairs to the B2B connectorconnectors.
| Bank | Type | B2B Connector | I/O signal count | LVDS-pairs count | VCCO bank voltage | Notes |
|---|---|---|---|---|---|---|
| 12 | HR | J1 | 50 | 24 | user (VCCIO_12) | supported voltages from 1.2V to 3.3V |
| 13 | HR | J1 | 50 | 24 | user (VCCIO_13) | supported voltages from 1.2V to 3.3V |
| 34 | HP | J2 | 50 | 24 | user (VCCIO_34) | supported voltages from 1.2V to 1.8V |
| 35 | HP | J2 | 50 | 24 | user (VCCIO_35) | supported voltages from 1.2V to 1.8V |
| 500 | MIO | J2 | 5 | - | 1.8V | - |
| 501 | MIO | J3 | 12 | - | 1.8V | - |
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| PHY Pin | ZYNQ PS | B2B | Notes |
|---|---|---|---|
| MDC/MDIO | MIO52, MIO53 | - | - |
| PHY LEDs | - | PHY_LED0: J2-144 | - |
| PHY_LED2 / INTn: | - | J2-148 | low active interrupt line |
| PHY_CLK125M | - | J2-150 | 125 MHz Ethernet PHY clock out |
| CONFIG | - | - | permanent high (PS_1.8V) |
| RESETn | MIO9 | - | low active reset line |
| RGMII | MIO16..MIO27 | - | Reduced Gigabit Media Independent Interface |
| SGMII | - | - | Serial Gigabit Media Independent Interface |
| MDI | - | PHY_MDI0: J2-120 / J2-122 PHY_MDI1: J2-126 / J2-128 PHY_MDI2: J2-132 / J2-134 PHY_MDI3: J2-138 / J2-140 | Media Independent Interface |
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Table 14: Maximum current of power supplies. *to be determined soon with reference design setup.
Lowest For the lowest power consumption and highest efficiency of on board DC/DC regulators it is recommended to powering the module from one single 3.3V supply. All input power supplies have a nominal value of 3.3V. Although the input power supplies can be powered up in any order, it is recommended to power them up simultaneously.
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Voltages on B2B | B2B J1 Pin | B2B J2 Pin | B2B J3 Pin | Input/ | Note |
|---|---|---|---|---|---|
| PL_VIN | 147, 149, 151, 153, | - | - | Input | supply voltage |
| PS_VIN | - | 154, 156, 158 | - | Input | supply voltage |
| PS_3.3V | - | 160 | - | Input | supply voltage |
| VCCIO12 | 54, 55 | - | - | Input | high range bank I/O voltage |
| VCCIO13 | 112, 113 | - | - | Input | high range bank I/O voltage |
| VCCIO33 | - | - | 115, 120 | Input | high performance bank I/O voltage |
| VCCIO34 | 29, 30 | - | Input | high performance bank I/O voltage | |
| VCCIO35 | 87, 88 | - | Input | high performance bank I/O voltage | |
| VBAT_IN | 146 | - | - | Input | RTC (battery-bufferedbacked) supply voltage |
| PS_1.8V | - | 130 | - | Output | internal 1.8V voltage level (Process System supply) |
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