Page History

...

The B2B connectors are high-speed hermaphroditic stacking strips and provide a providing modular interface to the SoC's PL and PS I/O's supporting Os. Both single ended and differential signalling as the I/Os are usable as LVDS pairs are supported.

...

Table 3: B2B connector pin-outs of available SoC's MGT lanes of the SoC moduleconnections to the B2B connectors

JTAG Interface

JTAG access is provided through the SoC's PS configuration bank 0 and available on B2B connector J1.

Table 4: B2B connector pin-out of JTAG interface

System Controller I/O Pins

signals

System Controller I/O Pins

Following special purpose pins are connected to System Controller CPLDSpecial purpose pins are connected to smaller System Controller CPLD and have following default configuration:

Table 5: B2B connector pin-out of SC CPLD System Controller CPLD special purpose I/O - pins

On-board LEDs

...

Clocking

The SoC module has the following sources to be provided with extern reference clock signals reference clocking signals provided by external baseboard sources and on-board clock oscillators:

Table 7: Clock sources overview

...

...

Gigabit Ethernet Interface

On-board Gigabit Ethernet PHY is provided with Marvell Alaska 88E1512 IC. The Ethernet PHY RGMII Interface interface is connected to the Zynq Ethernet0 PS GEM0. I/O voltage is fixed at 1.8V for HSTL signalingsignalling. The reference clock input of the PHY is supplied from an the on-board 25MHz 25.000000 MHz oscillator (U9), the . The 125MHz PHY output clock is available on (PHY_CLK125M) is routed to the B2B connector J2 , pin J2- 150.

...

USB PHY is provided by USB3320 from Microchip. The ULPI interface is connected to the Zynq PS USB0.  The I/O Voltage voltage is fixed at 1.8V . The and PHY reference clock input of the PHY input is supplied from an the on-board 25.000000 MHz oscillator (U15).

Table 10: USB PHY interface connections

The schematics for the USB connector and required components is different depending on the USB usage. USB standard A or B connectors can be used for Host or Device modes. A Mini USB connector can be used for USB Device mode. A USB Micro connector can be used for Device mode, OTG Mode or Host Mode.

I2C Interface

The I²C-I²C interface on the B2B - connector J2 with the pins J2- 119 (I2C_33_SCL) and J2- 121 (I2C_33_SDA) is operating with the reference voltage have PS_3.3V as a reference voltage.

Except the RTC (U24), the remaining component's I²C-interfaces all remaining I²C slave devices are operating with the reference voltage PS_1.8V (via voltage level shifting translating (3.3V ↔ 1.8V via I²C ) I²C bus repeater (U17).

 I2C addresses for on-board devices are listed in the table below:

Table 11:  Module's I²CI²C-interfaces overview

Boot Process

...

MAC Address EEPROM

A Microchip 24AA025E48 serial EEPROM (U23) is used which contains a globally unique 48-bit node address, that which is compatible with EUI-48(TM) and EUI-64(TM) specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks stores the 48-bit node address and is write protected, the other block is available for application use. It is accessible through the I²C slave over I²C bus with slave device address 0x53.

RTC - Real Time Clock

An temperature compensated Intersil ISL12020M is used as Real Time Clock (U24). Battery voltage must be supplied to the clock from the base board via pin 'VBAT_IN' (J1-146). Battery backed registers can be accessed over I²C I²C bus at slave address 0x6F. General purpose RAM of the RTC can be accessed at I²C ^I2C slave address 0x57. RTC IC is supported by Linux so it can be used as hwclock device. The interrupt line 'RTC_INT' of the RTC is connected to System Controller CPLD on bank 3 , pin 4.

Programmable PLL Clock (Phase-Locked Loop)

There is a Silicon Labs I²C I²C programmable quad PLL clock generator Si5338A (U16) on-board. It's output frequencies can be programmed by using the I²CI²C-bus with address 0x70.

A 25 MHz (U21) oscillator is connected to pin 3 (IN3) and is used to generate the output clocks.

Once running, the frequency and other parameters can be changed by programming the device using the I²CI²C-bus connected between the Zynq module (master) and reference clock signal generator (slave).

...

Power Consumption

...

For the lowest power consumption and highest efficiency of on board DC/-DC regulators it is recommended to powering the module from one single 3.3V supply. All input power supplies have a nominal value of 3.3V. Although the input power supplies can be powered up in any order, it is recommended to power them up simultaneously.

...