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Following table gives a summary of the available I/O's, interfaces and differential pairs of the B2B connectors JB1, JB2 and JB3:

Table 1: General overview of PL I/O signals and SoM's interfaces connected to the B2B connectors.

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Following table gives a summary of the pin-assignment, available interfaces and functional I/O's of the pin headers:

Table 2: General overview of PL I/O signals, SoM's interfaces and control signals connected to the on-board connectors.

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Following table describes the pin-assignment of the SFP+ connector in detail:

Table 3: SFP+ connector pin-assignment.

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Each conductor of the RX and TX differential pair is routed to one coaxial connector:

Table 4: Pin-assignment of the coaxial connectors.

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JTAG access to the mounted SoM is provided through B2B connector JB2 and is also routed to the XMOD header JX1 and pin header J3. With the TE0790 XMOD USB2.0 to JTAG adapter, the device of the mounted SoM can be programed via USB2.0 interface.

Table 5: JTAG interface signals.

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Following table describes the signals and interfaces of the XMOD header JX1:

Table 6: XMOD header JX1 signals and connections.

When using XMOD FTDI JTAG Adapter TE0790, the adapter-board's VCC and VCCIO will be sourced by the Carrier Board's and module's 3.3V supply voltage. Set the XMOD DIP-switch with the setting:

Table 7: XMOD adapter board DIP-switch positions for voltage configuration.

The I/O-voltage of the XMOD adapter board with the schematic name 'V_CFG' and pin-name 'VIO' (pin 6) on XMOD header JX1 can be selected via Jumper J27:

Table 8: Setting of reference I/O-voltage XMOD header.

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As alternative to the XMOD header JX1, on the Carrier Board pin header J3 is present, which has a XMOD header-compatible pin-assignment, but also 4 additional pins as differential pairs to supply the mounted SoM with an external MGT reference clock signal and as differential analog signal input:

Table 9: JTAG/UART header J3 signals and connections.

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UART interface is available on B2B connector JM2. With the TE0790 XMOD USB2.0 adapter, the UART signals can be converted to USB2.0 interface signals:

Table 10: UART interface signals.

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The QSPI interface (if available) of the mounted SoM is routed to the pin header J17. The reference I/O-voltage of the module have to be noticed when using this interface.

Table 11: QSPI interface signals.

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The on-board LEDs are available to the user and can be used to indicate system status and activities:

Figure 12: On-board LEDs

VCCIO Selection Jumper

On the TEBB0714 Carrier Board the PL-bank I/O voltage (schematic name 'VCCIO34') can be selected by the jumper J26.

Table 13: Base-board PL-bank I/O voltage setting.

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Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Table 14: Typical power consumption.

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The external power-supply can be connected to the board by the following pins:

Table 15: Connector pins capable for external 3.3V power supply

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The voltage direction of the power rails is from board and on-board connectors' view:

Table 16: Power pin description of B2B module connector.

Table 17: Power Pin description of on-board connector.

Table 18: Power Pin description of VCCIO selection jumper pin header.

Table 19: Power pin description of XMOD/JTAG Connector.

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings

Table 20: Board absolute maximum ratings.

Recommended Operating Conditions

Table 21: Module recommended operating conditions.

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Hardware Revision History

Table 22: Module hardware revision history.

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Table 23: Document change history.

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