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Following tables contains information about the interfaces, I/O's, clock and VCCIO sources available on the cPCI connectors:

  1. CompactPCI Serial Connector J1
  2. CompactPCI Serial Connector J3
  3. CompactPCI Serial Connector J4
  4. CompactPCI Serial Connector J5
  5. CompactPCI Serial Connector J6



Anchor
CompactPCI Connector J1
CompactPCI Connector J1

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Scroll Title
anchorTable_OBP_dip_switches
titleTEC0850 DIP-switches description

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DIP-switch S1Signal Schematic NameConnected toFunctionalityNotes
S1-1

JTAGEN

SC FPGA U18, bank 1B, pin E5

Positions:
OFF: SC FPGA's JTAG enabled
ON: Zynq MPSoC's JTAG enabled

to switch the JTAG interface between SC FPGA and Zynq MPSoC
S1-2

WP

EEPROM U63, pin 7

Positions:
OFF: Write Protect is enabled
ON: Write Protect is disabled

-
S1-3

PUDC_B

Zynq MPSOC PS Config Bank 503, pin AD15

Positions:
ON: PUDC_B is Low
OFF: PUDC_B is HIGH

Internal pull-up resistors during configuration
are enabled at ON-position, means I/O's are 3-stated
until the configuration of the FPGA completes.

S1-4

SW4

SC FPGA U18, bank 8, pin A5SC Switch (Reserved for future use)low active logic
DIP-switch S2Signal Schematic NameConnected toFunctionalityNotes
S2-1

MODE3

Zynq MPSOC PS Config Bank 503, pin R23

set 4-bit code for boot mode selection

See Zynq UltraScale+ Device Technical Reference Manual
page 236 for full boot modes description


Set DIP-switches as bit pattern

"S1-4 | S1-3 | S1-2 | S1-1  :  Boot Mode":ON | ON | ON  | ON   :  JTAG Boot Mode
ON | ON | ON  | OFF  :  Quad-SPI
ON | ON | OFF | OFF  :  SD Card

of S2

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BOOT Mode1234
Quad-SPI (32bONONOFFON
SD1 (2.0)ONOFFONOFF
JTAGONONONON





S2-2

MODE2

Zynq MPSOC PS Config Bank 503, pin T23

S2-3

MODE1

Zynq MPSOC PS Config Bank 503, pin R22

S2-4

MODE0

Zynq MPSOC PS Config Bank 503, pin T22


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titleDocument change history

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DateRevisionConstributorDescription

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infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat

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infoTypeCurrent version
prefixv.
typeFlat
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infoTypeModified by
typeFlat
showVersionsfalse

  • boot mode bugfix
2018-10-26v.103John Hartfiel
  • change" Compact PCI" to "Compact PCI Serial"

v.102Ali Naseri
  • small corrections


v.101


John Hartfiel


  • style changes

v.97Ali Naseri

  • added information about the optional second USB2 PHY and cPCI connector J2 (not fitted by default)

v.94

John Hartfiel

  • small style changes and typo correction

v.93 Ali Naseri , Oleksandr Kiyenko , John Hartfiel
  • initial release
--all

Page info
infoTypeModified users
typeFlat
showVersionsfalse

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