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| Scroll Title |
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| anchor | Table_x |
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| title | Table x: MGT Banks |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Bank | Connector | Lanes |
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| PL 128 | J4G and J4H | 4 | | PL 129 | J5A and J5B | 4 | | PL 130 | J5C and J5D | 4 | | PL 230 | J4G and J4H | 4 | | PL 229 | J5A and J5B | 4 | | PL 228 | J5C and J5D | 4 | | PS 505 | J1A | 4 |
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MGT reference clocks are connected to banks 129, 229 and 505. Banks 128 and 130 should share clock from bank 129, banks 230 and 228 from bank 229.
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| Scroll Title |
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| anchor | Table_x |
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| title | Table x: Module absolute maximum ratings. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Parameter | Min | Max | Unit | Notes / Reference Document |
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| LP_DCDC | -0.3 | 4 | V | TPS3106K33DBVR data sheet | | GT_DCDC | -0.3 | 7 | V | TPS82085SIL data sheet | | PS_BATT | -0.5 | 2 | V | Xilinx DS925 data sheet | | PLL_3V3 | -0.5 | 3.8 | V | Si5345/44/42 data sheet | | VCCO for HD I/O banks | -0.5 | 3.4 | V | Xilinx DS925 data sheet | | VCCO for HP I/O banks | -0.5 | 2 | V | Xilinx DS925 data sheet | | I/O input voltage for HD I/O banks | -0.55 | VCCO + 0.55 | V | Xilinx DS925 data sheet | | I/O input voltage for HP I/O banks | -0.55 | VCCO + 0.55 | V | Xilinx DS925 data sheet | | PS I/O input voltage (MIO pins) | -0.5 | VCCO_PSIO + 0.55 | V | Xilinx DS925 data sheet,
VCCO_PSIO 1.8V nominally | | PS GTR reference clocks absolute input voltage | -0.5 | 1.1 | V | Xilinx document DS925 | | PS GTR absolute input voltage | -0.5 | 1.1 | V | Xilinx document DS925 | | MGT clock absolute input voltage | -0.5 | 1.3 | V | Xilinx document DS925 | MGT Receiver (RXP/RXN) and transmitter
(TXP/TXN) absolute input voltage | -0.5 | 1.2 | V | Xilinx DS925 data sheet | Voltage on input pins of
NC7S08P5X 2-Input AND Gate | -0.5 | VCC + 0.5 | V | NC7S08P5X data sheet,
see schematic for VCC | Voltage on input pins (nMR) of
TPS3106K33DBVR Voltage Monitor, U41 | -0.3 | VDD + 0.3 | V | TPS3106 data sheet,
VDD = LP_DCDC | "Enable"-signals on TPS82085SIL
(EN_PLL_PWR, EN_LPD) | -0.3 | 7 | V | TPS82085SIL data sheet | Storage temperature (ambient) | -40 | 100 | °C | ROHM Semiconductor SML-P11 Series data sheet |
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Recommended Operating Conditions
| Scroll Title |
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| anchor | Table_x |
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| title | Table x: Module absolute maximum ratings. |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
|---|
| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Parameter | Min | Max | Unit | Notes / Reference Document |
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| PL_DCIN | 3.3 | 6 | V | EN63A0QI / TPS82085SIL data sheet | | DCDCIN | 3.3 | 6 | V | TPS82085SIL / TPS51206PSQ data sheet | | LP_DCDC | 3.3 | 3.6 | V | TPS82085SIL / TPS3106 data sheet | | GT_DCDC | 3.3 | 6 | V | TPS82085SIL data sheet | | PS_BATT | 1.2 | 1.5 | V | Xilinx DS925 data sheet | | PLL_3V3 | 3.3 | 3.47 | V | Si5345/44/42 data sheet
3.3V typical | | VCCO for HD I/O banks | 1.14 | 3.4 | V | Xilinx DS925 data sheet | | VCCO for HP I/O banks | 0.95 | 1.9 | V | Xilinx DS925 data sheet | | I/O input voltage for HD I/O banks. | -0.2 | VCCO + 0.2 | V | Xilinx DS925 data sheet | | I/O input voltage for HP I/O banks | -0.2 | VCCO + 0.2 | V | Xilinx DS925 data sheet | | PS I/O input voltage (MIO pins) | -0.2 | VCCO_PSIO + 0.2 | V | Xilinx DS925 data sheet,
VCCO_PSIO 1.8V nominally | | PL bank reference voltage VREF pin | -0.5 | 2 | V | Xilinx DS925 data sheet | Voltage on input pins of
NC7S08P5X 2-Input AND Gate | 0 | VCC | V | NC7S08P5X data sheet,
see schematic for VCC | Voltage on input pin 'MR' of
TPS3106K33DBVR Voltage Monitor, U41 | 0 | VDD | V | TPS3106 data sheet,
VDD = LP_DCDC |
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Physical Dimensions
| Scroll Title |
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| anchor | Figure_x |
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| title | Figure x: Physical dimensions drawing |
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| Scroll Ignore |
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Create DrawIO object here: Attention if you copy from other page, use |
| Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
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