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titleFigure 18: Quad-SPI Flash Memory
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titleTable x: SI5345 I2C address

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ICMemory DensityMIOSignal Schematic NameFlash Memory Pin

QSPI Flash U24,

N25Q256A11E1240E

256 Mbit (32 MByte)0

MIO0

B2
1

MIO1

D2
2

MIO2

C4
3

MIO3

D4
4

MIO4

D3
5

MIO5

C2

QSPI Flash U25,

N25Q256A11E1240

256 Mbit (32 MByte)7

MIO7

C2
8MIO8D3
9MIO9D2
10MIO10C4
11MIO11D4
12MIO12B2

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titleFigure 19: On-board configuration EEPROMs
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The EEPROMs U63 and U64 are programmable via the on-board I²C bus connected to MIO 20...21 pins. The I²C address is shown in the table below.

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titleFigure 20: TEC0850 cPCI USB2 interface
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titleTable x: EEPROMs I2C Addresses

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PHY PinConnected toNotes
ULPIPS bank MIO52 ... MIO63Zynq Ultrascale+ USB0 MIO pins are connected to the PHY
REFCLK-52MHz from on board oscillator U12
REFSEL[0..2]-All pins set to GND selects the external reference clock frequency (52.000000 MHz)
RESETB

Zynq MPSoC MIO16, pin AM16

Low active USB2 PHY Reset
DP, DMcPCI connector J1USB2 data lane
CPEN-External USB power switch active-high enable signal
VBUS5VConnected to USB VBUS via a series of resistors, see schematic
ID3.3VB-device

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IN:Legal Notices
IN:Legal Notices

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