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Table of Contents

Table of Contents

Overview

The Trenz Electronic TEP0003 is is a Pmod compatible motor driver board and good for developing BLCD or CD motor driving softwareBEMF (Back Electromagnetic Field) based drive. It can be used in many low cost drives where no low speed operation is needed.

Refer to http://trenz.org/tep0003-info for the current online version of this manual and other available documentation.

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Notes :

Key Features

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Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

Key Features'  must be split into 6 main groups for modues:

  • SoC/FPGA
    • Package:
    • Speed:
    • Temperature:
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension


Key Features'  must be split into 6 main groups for carrier:

  • Modules
    • TE0808, TE807, TE0803,...
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension


  • Modules/ SoC FPGA

    • Compatible with Digilent's Pmod interfaces

  • RAM/Storage
  • On Board

    • 30A 0-24V BLDC motor driver board

    • Supply current and voltage monitoring

    • Synchronous DC/DC Converter
    • CSD97394 power stage
  • Interface
    • Low power push-pull output comparator for monitoring driver channels
    • 2x A2D Converters
    • 3x Current Sensors
    • 6x Power Stages
  • Interface
    • 2x Pmod Pin Headers (2x6 Pol)
  • Power 
    •  3.3V supply voltage from Pmods
    Power 
    • Low 3,3V power draw from Pmod
  • Dimension
    • 40 mm x 40 mm

Block Diagram

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Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


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titleTExxxx TEP0003 block diagram


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Main Components

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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .


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titleTExxxx TEP0003 main components


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  1. Pmod Pin Header, J1
  2. Pmod Pin Header, J2
  3. Synchronous DC/DC Converter, U7
  4. Terminal Block, J3
  5. Terminal Block, J4
  6. Power Stages, U1...U6
  7. Current Sensors, U18, U21, U46
  8. ADC, U22, U47
  9. Terminal Block, J3
  10. Terminal Block, J4
  11.  Low-Power Push-Pull Output Comparator, U9

Initial Delivery Stat

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

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titleInitial delivery state of programmable devices on the module

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Storage device name

Content

Notes

--


--

--


Configuration Signals

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  • Overview of Boot Mode, Reset, Enables.

Signals, Interfaces and Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Pmod Connectors

TEP0003 is equipped with two Pmod Connectors. 

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titleGeneral PL I/O to B2B connectors information

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PinSchematicNotes
Pmod, J1Pmod, J2
Notes

MIO Pins

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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

1PWM_CH0ADC_CH
2PWM_CH1ADC_SCK
3PWM_CH2ADC_CS
4-SENSOR_FAUL
5GNDGND
63.3V3.3V
7COMP_CH0ADC0_DO
8COMP_CH1ADC1_DO
9COMP_CH2-
10--
11GNDGND
123.3V3.3V


Terminal blocks

The TEP0002 is equipped with two Terminal Blocks J3 and J4.

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titleTerminal Blocks information

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DesignatorPinSchematicNotes
J31DRV_CH2ARK500-3
2DRV_CH1ARK500-3
3DRV_CH0ARK500-3
J41DC_INARK500-2
2GNDARK500-2


On-board Peripherals

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  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

...

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

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titleMIOs pins

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  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs
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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

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titleOn board peripherals

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Notes :

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit
Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


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titlePower Consumption

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Power Input PinTypical Current
VINTBD*

* TBD - To Be Determined

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Chip/InterfaceDesignatorNotes
ADCU22, U47


Analog to Digital Converters

The TEP0003 has two ADCs, U22 and U47. 

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titlePower DistributionAnalog Digital Converter

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Power-On Sequence

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PinsConnected to
ADC, U22ADC, U47Notes
AVDD5V5V
REF5V5V
AIN0+U18 (VIOUT)DC_IN
AIN0-GNDGND
AIN1+U21 (VIOUT)U46 (VIOUT)
AIN1-GNDGND
REFGNDGNDGND
DVDD3.3V3.3V
SCLKADC_SCKADC_SCKAccess via Pmod, J2
SDOADC1_DOADC0_DOAccess via Pmod, J2
CSADC_CSADC_CSAccess via Pmod, J2
CH_SELADC_CHADC_CHAccess via Pmod, J2
PDENGNDGND



Power and Power-On Sequence

Voltage Monitor Circuit

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titleVoltage Monitor Circuit
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Power Rails

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titleModule power rails.

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B2B Connector

JM1 Pin

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B2B Connector

JM2 Pin

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B2B Connector

JM3 Pin

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Bank Voltages

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titleZynq SoC bank voltages.

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Bank          

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Voltage

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  • This section is optional and only for modules.

    • use "include page" macro and link to the general B2B connector page of the module series,

    For example: 6 x 6 SoM LSHM B2B Connectors
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    Include Page
    PD:6 x 6 SoM LSHM B2B ConnectorsPD:6 x 6 SoM LSHM B2B Connectors

    ? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

    3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)

    In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

    • Power on-sequence
    • Power distribution
    • Voltage monitoring circuit


    Note

    For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


    Power Supply

    TEP0003 will be power supplied through 3.3V from Pmods, J1 and J2.

    Power Consumption

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    Power Input PinTypical Current
    3.3VTBD*


    * TBD - To Be Determined

    Power Distribution Dependencies

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    titlePower Distribution


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    Power-On Sequence

    There is no specific power on sequence, after power on all electrical components will be enabled. 

    Power Rails

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    titleModule power rails.

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    Power Rail Name

    Pmod J1 Pin

    Pmod J2 Pin

    		Notes
    3.3V6,126,12

    ...



    Technical Specifications

    Absolute Maximum Ratings

    V
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    titlePS absolute maximum ratings

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    SymbolsDescriptionMinMaxUnit
    3.3VSupply Voltage-0.36.5
    		V
    V
    V
    T_STGStorage Temperature-40105°C
    VVVV


    Recommended Operating Conditions

    Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

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    titleRecommended operating conditions.

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    ParameterMinMaxUnitsReference Document
    		VSee ???? datasheets.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.°CSee Xilinx ???? datasheet.
    3.3V3.04.2VSupplied from Pmod
    T_OPR-30+105°CSee ARK500-3 and ARK500-2 Datasheet
    °CSee Xilinx ???? datasheet.


    Physical Dimensions

    • Module size: ?? 40 mm × ?? 40 mm.  Please download the assembly diagram for exact numbers.Mating height with standard connectors: ? mm.

    PCB thickness: 1.6 mm.

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    In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

    For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

    https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

    Note

    For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


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    titlePhysical Dimension


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    Currently Offered Variants 

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    Set correct link to the shop page overview table of the product on English and German.

    Example for TE0728:

        ENG Page: https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/TE07XX-Zynq-SoC/TE0728-Zynq-SoC/

        DEU Page: https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/TE07XX-Zynq-SoC/TE0728-Zynq-SoC/

    For Baseboards or modules, where no overview page is available (and revision number is coded in the direct link) use shop search link, e.g. TE0706:

        ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TE0706

       DEU Page: https://shop.trenz-electronic.de/de/search?sSearch=TE0706

    ...

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    titleTrenz Electronic Shop Overview

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    Trenz shop TEP0006 TEP0003 overview page
    English pageGerman page


    Revision History

    Hardware Revision History

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    Set correct links to download  arrier, e.g. TE0706 REV02:

      TE0706-02  ->   https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents

    Note:

    • Date format:  YYYY-MM-DD

    ...

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    titleHardware Revision History

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    DateRevisionChangesDocumentation Link
    2018-07-18Rev0101
    • Initial Release
    		Rev01REV01


    Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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    Document Change History

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      • Add new row below first

      • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

      • Metadata is only used of compatibility of older exports

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    DateRevisionContributorDescription

    Page info
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    typeFlat

    Page info
    infoTypeCurrent version
    prefixv.
    typeFlat
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    Page info
    infoTypeModified by
    typeFlat
    showVersionsfalse

    • Initial Release

    --

    all

    Page info
    infoTypeModified users
    typeFlat
    showVersionsfalse

    • --


    Disclaimer

    Include Page
    IN:Legal Notices
    IN:Legal Notices

    ...