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Table of Contents

Table of Contents

Overview

The Trenz Electronic TEP0003 is is a Pmod compatible motor driver board and good for developing BLCD or CD motor driving software.

Refer to http://trenz.org/tep0003-info for the current online version of this manual and other available documentation.

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Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

Key Features'  must be split into 6 main groups for modues:

  • SoC/FPGA
    • Package:
    • Speed:
    • Temperature:
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension


Key Features'  must be split into 6 main groups for carrier:

  • Modules
    • TE0808, TE807, TE0803,...
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension


  • Modules/ SoC FPGA
    • TE0808, TE807, TE0803,...

      Compatible with Digilent's Pmod interfaces

  • RAM/Storage
  • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
    • 30A 0-24V BLDC motor driver board

    • Supply current and voltage monitoring

    • Synchronous DC/DC Converter
    • CSD97394 power stage
  • Interface
    • Low power push-pull output comparator for monitoring driver channels
  • Power 
    • Low 3,3V power draw from Pmod
  • Dimension
    • 40 mm x 40 mm
    Dimension

Block Diagram

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add drawIO object here.

Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


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Scroll Title
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titleTExxxx main components


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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

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  1. Pmod Pin Header, J1
  2. Pmod Pin Header, J2
  3. Synchronous DC/DC Converter, U7
  4. Terminal Block, J3
  5. Terminal Block, J4
  6.  Low-Power Push-Pull Output Comparator, U9

Initial Delivery Stat

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

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titleInitial delivery state of programmable devices on the module

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System Controller CPLD

Storage device name

Content

Notes

Quad SPI Flash

EEPROM
--


--

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Configuration Signals

Boot Mode
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  • Overview of Boot Mode, Reset, Enables.
Scroll Title
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titleBoot process.
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MODE Signal State

Signals, Interfaces and Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Pmod Connectors

TEP0003 is equipped with two Pmod Connectors. 

Scroll Title
anchorTable_OVSIP_RSTB2B
titleReset process.General PL I/O to B2B connectors information

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Signal
Pin
B2BI/ONote

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Pmod, J1Pmod, J2Notes

























MIO Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

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anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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JTAG access to the TExxxx SoM through B2B connector JMX.

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anchorTable_SIP_JTG
titleJTAG pins connection

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JTAG Signal

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B2B Connector

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MIO Pins

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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI

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SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

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anchorTable_OBP_MIOs
titleMIOs pins

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs
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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

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anchorTable_OBP
titleOn board peripherals

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Quad SPI Flash Memory

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Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

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anchorTable_OBP_SPI
titleQuad SPI interface MIOs and pins

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anchorTable_OBP_RTC
titleI2C interface MIOs and pins

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anchorTable_OBP_I2C_RTC
titleI2C Address for RTC

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anchorTable_OBP_EEP
titleI2C EEPROM interface MIOs and pins

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anchorTable_OBP_I2C_EEPROM
titleI2C address for EEPROM

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LEDs

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anchorTable_OBP_LED
titleOn-board LEDs

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DDR3 SDRAM

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Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.

  • Part number: 
  • Supply voltage:
  • Speed: 
  • NOR Flash
  • Temperature: 

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Scroll Title
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titleEthernet PHY to Zynq SoC connectionsMIOs pins

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BankSignal NameETH1ETH2Signal Description

CAN Transceiver

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anchorTable_OBP_CAN
titleCAN Tranciever interface MIOs
MIO PinConnected toB2BNotes






































On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


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KHz
Scroll Title
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titleOsillatorsOn board peripherals

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Chip/InterfaceDesignator
DescriptionFrequencyNoteMHzMHz
Notes
















Power and Power-On Sequence

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