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  • Modules/ SoC FPGA
    • Compatible with Digilent's Pmod interfaces

  • RAM/Storage
  • On Board
    • 30A 0-24V BLDC motor driver board

    • Supply current and voltage monitoring

    • Synchronous DC/DC Converter
    • CSD97394 power stage
  • Interface
    • Low power push-pull output comparator for monitoring driver channels
    • 2x A2D Converters
    • 3x Current Sensors
    • 6x Power Stages
  • Interface
    • 2x Pmod Pin Header (2x6 Pol)
  • Power 
    •  3.3V supply voltage from Pmods
    Power 
    • Low 3,3V power draw from Pmod
  • Dimension
    • 40 mm x 40 mm

Block Diagram

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titleTExxxx block diagram


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Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

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PinPmod, J1Pmod, J2Notes

MIO Pins

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idComments

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

1PWM_CH0ADC_CH
2PWM_CH1ADC_SCK
3PWM_CH2ADC_CS
4-SENSOR_FAUL
5GNDGND
63.3V3.3V
7COMP_CH0ADC0_DO
8COMP_CH1ADC1_DO
9COMP_CH2-
10--
11GNDGND
123.3V3.3V


On-board Peripherals

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Notes :

  • add subsection

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SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

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anchorTable_OBP_MIOs
titleMIOs pins

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

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Scroll Title
anchorTable_OBP
titleOn board peripherals

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Chip/InterfaceDesignatorNotes

Power and Power-On Sequence

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hiddentrue
idComments

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit
Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

ADCU22, U47


Analog to Digital Converters

Scroll Title
anchorTable_OBP_ADC
titleAnalog Digital Converter

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Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

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titlePower Consumption

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Power Input PinTypical Current
VINTBD*

* TBD - To Be Determined

Power Distribution Dependencies

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anchorFigure_PWR_PD
titlePower Distribution
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DesignatorPinsSchematicNotes
ADC




Power and Power-On Sequence

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hiddentrue
idComments

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

TEP0003 will be power supplied through 3.3V from Pmods.

Power Consumption

Scroll Title
anchorTable_PWR_PC
titlePower Consumption

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Power Input PinTypical Current
VINTBD*


* TBD - To Be Determined

Power Distribution Dependencies

Power-On Sequence

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anchorFigure_PWR_PS
titlePower Sequency
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Scroll Title
anchorFigure_PWR_VMCPD
titleVoltage Monitor CircuitPower Distribution


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Power Rails

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anchorTable_PWR_PR
titleModule power rails.

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B2B Connector

JM1 Pin

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B2B Connector

JM2 Pin

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B2B Connector

JM3 Pin

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Power-On Sequence

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Scroll Title
anchorTableFigure_PWR_BVPS
titleZynq SoC bank voltages.Power Sequency


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Bank          

Schematic Name

Voltage

Notes

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hiddentrue
idComments

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use "include page" macro and link to the general B2B connector page of the module series,

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? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)

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Voltage Monitor Circuit

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anchorFigure_PWR_VMC
titleVoltage Monitor Circuit


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Power Rails

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anchorTable_PWR_PR
titleModule power rails.

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Power Rail Name

Pmod J1 Pin

Pmod J2 Pin

Notes
3.3V6,126,12


Bank Voltages

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anchorTable_PWR_BV
titleZynq SoC bank voltages.

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Bank          

Schematic Name

Voltage

Notes

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Technical Specifications

Absolute Maximum Ratings

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titlePS absolute maximum ratings

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V
SymbolsDescriptionMinMaxUnitV




V




V




VVVV


Recommended Operating Conditions

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Scroll Title
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titleRecommended operating conditions.

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See Xilinx ???? datasheet.
ParameterMinMaxUnitsReference Document
ParameterMinMaxUnitsReference Document
VSee ???? datasheets.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.VSee Xilinx ???? datasheet.V



VSee Xilinx ???? datasheetdatasheets.



°CVSee Xilinx ???? datasheet.



°CSee Xilinx ???? datasheet.


Physical Dimensions

  • Module size: ?? 40 mm × ?? 40 mm.  Please download the assembly diagram for exact numbers.Mating height with standard connectors: ? mm.

PCB thickness: 1.6 mm.

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idComments

In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


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Scroll Title
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titleTrenz Electronic Shop Overview

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Trenz shop TEP0006 TEP0003 overview page
English pageGerman page


Revision History

Hardware Revision History

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