This guide shows the main components of the TE0802 module and introduces the first steps to get the provided reference design up and running.
This module TE00802 has a Xilinx Zynq Ultrascale+ and several hardware features onboard that allows you to create digital hardware and software designs. For communication and configuration the module board offers a JTAG/UART Interface.
| Hardware | Software |
|---|---|
|
|
| TE0802-02-1BEV2-A | TE0802-02-2AEV2-A | |
|---|---|---|
| MPSoC | Xilinx Zynq UltraScale+
| Xilinx Zynq UltraScale+
|
| Storage |
| |
| Display |
| |
| Audio |
| |
| Connectors |
| |
| Communication & Debug |
| |
| Input |
| |
Information on IO routing and FPGA pin connections can be found in the
The provided reference design "TE0802 test board" we are introducing in this Getting started guide interacts with most of the peripheral on the module. It shows as an example how to connect the different parts of the module to simplify the development of your own application. You can use it for your own design but keep in mind the overall FPGA resources and power consumption before deployment. The most important steps to get it up and running from the scratch are explained on TE0802 Test Board. The Download is available here.
An overview of the components used in this reference design is illustrated in the following figure:

Check the settings from DIP-Switch S1 (JTAG):
| S1.1 | S1.2 | S1.3 | S1.4 |
|---|---|---|---|
| OFF | OFF | OFF | OFF |
Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):
Program 'u-boot' application on QSPI flash
TE::pr_program_flash -swapp u-boot
Switch the DIP-Switch S1 to QSPI-Boot mode
| S1.1 | S1.2 | S1.3 | S1.4 |
|---|---|---|---|
| ON | OFF | OFF | OFF |
Power on the module board
In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM port (visible in Device Manager).


Boot process
Zynq Boot ROM loads FSBL from QSPI into OCM,
Connect the module board with the power supply (5V)
Power on module board
Program 'hello_te0802' application on QSPI flash
TE::pr_program_flash -swapp hello_te0802
Switch the DIP-Switch S1 to QSPI-Boot mode:
| S1.1 | S1.2 | S1.3 | S1.4 |
|---|---|---|---|
| ON | OFF | OFF | OFF |
Restart the module board
In case the QSPI Flash is loaded with the reference design, you can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM-port (visible in Device Manager).


Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):
Switch the DIP-Switch S1 to SD-Boot mode
| S1.1 | S1.2 | S1.3 | S1.4 |
|---|---|---|---|
| ON | ON | OFF | OFF |
Power on the module board
You can connect to the board with a program like PuTTY. Just open up a serial session with baudrate of 115200 and the right COM port (visible in Device Manager).


Boot process
Zynq Boot ROM loads FSBL from SD into OCM,
After the Linux boot is complete, you can use the Linux shell and the connected peripherals
i2cdetect -l (Shows a list of the available I2C buses) i2cdetect -y -r 1 (check I2C 1 Bus)
dmesg | grep rtc (RTC check) hwclock --test
udhcpc (ETH0 check) ifconfig (shows the configuration of the network interface)
lsusb (USB check)
lspci (PCIe check)
aplay /<link to mounted sd card>/<filename>.wav (e.g. aplay /run/mount/sd/<filename>.wav)
Display Port must be connected to activate audio drivers. Use .wav or other aplay supported formate

changed Value from 25MHz CLK to unsigned. Note: Frequency Counter is inaccurate and displayed unit is Hz

Document Revision History
| Date | Version | Description | Authors |
|---|---|---|---|
| |||
| 2024.12.17 | v1.13 |
| Markus Kirberg |
| 2022.09.09 | v1.12 |
| Manuela Strücker |
| -- | all |