Overview

Lattice MachXO2-4000HC is a CPLD chip, that is used in TEB0912 board as a system management controller. The system controller implements power management same as power sequencing, . Rather than power management is the system controller responsible for reset generation, zynq initial configuration. System controller contains of some additional features same as debouncing the power button and displaying the power status with LEDs. The  JTAG and UART interfaces are routed  in the firmware of CPLD  from FTDI chip to FPGA. In this board the CPLD is responsible for controlling and monitoring of power supply of the board. There are various DC-DC converter or regulators , one input current sensor and six temperature sensors. To control every converter chip or regualtor monitors CPLD power good outputs of regulators or DC-DC converters continuously to avoid over-voltage in the power system. System controller reads the measured temperature of all temperature sonsors continuously to avoid over-temperature in regulators or DC-DC converter chips. The firmware of CPLD contains of various subsystems same as i2c master and i2c slave subsystems. I2c master reads the data of current sensor and 6 temperature sensors  , that measure the temperature of DC-DC converter chips. I2c slave is responsible for communicating with FPGA to read register addresses and write the measured data in FPGA.

Feature Summary

  • Power Management
  • Reset Management
  • JTAG Routing
  • Boot Mode
  • User IOs
  • LED and power state display
  • UART
  • I2C Slave
  • I2C Master
  • I2C to GPIO
  • RAM Memory
  • Data Management State Machine
  • Temperature Sensor TMP461
  • Current Sensor INA219AIDCNR

Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

Name / opt. VHDL NameDirectionPinPullup/Down (HW)Bank PowerDescription
ALERT_NinB33--- (UP)+3.3V_STBDigital output . Interrupt or SMBus alert output of temperature sensors (TMP461AIRUNT- U43,U47,U52,U57,U4) and temperature sensor with integrated fan control (LM96163-U61) /currently_not_used 
CPLD_DEBUG0inoutA41NONE (UP)+3.3V_STBCPLD debug pin 0
CPLD_DEBUG1inoutA2UP (UP)+3.3V_STBCPLD debug pin 1 --→ For monitoring of I2C master clock (SCL)
CPLD_DEBUG2inoutB1UP (UP)+3.3V_STBCPLD debug pin 2 --→ For monitoring of I2C master data (SDA)
CPLD_DEBUG3inoutA3--- (NONE)+3.3V_STBCPLD debug pin 3 /currently_not_used
CPLD_HD0inoutB3UP (UP)+3.3V_STBHigh density IOs select 0
CPLD_HD1inoutB28UP (UP)+3.3V_STBHigh density IOs select 1
EN_VCCINToutB22NONE (DOWN)+3.3V_STBEnable pin for +0.85V DC-DC converter (LTM4630EY-U42A)
EN_VTT_DDRoutA22NONE (DOWN)+3.3V_STBEnable pin for 2A Peak Sink/Source DDR Termination Regulator (TPS51206-U2, U3)
EN+0.85V_GT_AVCC_PS/ EN_0V85_GT_AVCC_PSoutB21NONE (DOWN)+3.3V_STBEnable pin for 1.5A low-dropout linear regulator (TPS74801DRC-U45)
EN+0.9V_GT_AVCC/ EN_0V9_GT_AVCCoutB14NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array  for +0.9V output voltage (LTM4644EY-U44)
EN+1.0V/ EN_1V0outA46NONE (DOWN)+3.3V_STBEnable pin for 1.5A low-dropout linear regulator with +1.0V output voltage (TPS74801DRC-U13)
EN+1.2V_DDR/ EN_1V2_DDRoutA34NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array  for +1.2V output voltage (LTM4644EY-U53)
EN+1.2V_GT_AVTT/ EN_1V2_GT_AVTToutB16NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array  for +1.2V output voltage (LTM4644EY-U48)
EN+1.2V_PLL_PS/ EN_1V2_PLL_PSoutA15NONE (DOWN)+3.3V_STBEnable pin for 1.5A low-dropout linear regulator (TPS74801DRC-U46)

EN+1.3V_MGT_PS/
EN_1V3_GT_PS

outB15NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.37V output voltage (LTM4644EY-U44) 
EN+1.8V/ EN_1V8outB13NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array  for +1.8V output voltage (LTM4644EY-U53)
EN+1.8V_AUX/ EN_1V8_AUXoutA30NONE (DOWN)+3.3V_STBEnable pin for 1.5A low-dropout linear regulator with +1.8V output voltage  (TPS74801DRC-U49,U50,U51)
EN+1.8V_GT_AVTT_PS/ EN_1V8_GT_AVTT_PSoutB20NONE (DOWN)+3.3V_STBEnable pin for 1.5A low-dropout linear regulator with +1.8V output voltage  (TPS74801DRC-U54)
EN+2.5V_DDR/ EN_2V5_DDRoutA44NONE (DOWN)+3.3V_STBEnable pin for 1.5A low-dropout linear regulator with +2.5V output voltage  (TPS74801DRC-U55, U56)
EN+2V_MGT_PS/ EN_2V0_GT_PSoutA21NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array  for +2.0V output voltage (LTM4644EY-U48)
EN+3.3V/ EN_3V3outB18NONE (DOWN)+3.3V_STBEnable pin for quad DC-DC microModule regulator with configurable 4A output array  for +3.3V output voltage (LTM4644EY-U1)
EN+5V_BIAS/ EN_5V_VBIASoutA17NONE (DOWN)+3.3V_STBEnable pin for low dropout linear regulator with +5V output voltage (ADP7102ACPZ-U58)
EXT_STATUS_LED_GoutB9--- (NONE)+3.3V_STBExternal status LED green (J40-Pin2) /currently_not_used
EXT_STATUS_LED_RoutA25--- (NONE)+3.3V_STBExternal status LED red (J40-Pin3) /currently_not_used
FAN_ENoutB29NONE (UP)+3.3V_STBEnables a smart high-side power switch to drive the FAN (BTS41411N-U60)
FPGA_DONEinA24NONE (UP)+3.3V_STBFPGA PL configuration done indicator
FTDI_PWR_EN_NinA36NONE (UP)+3.3V_STBActive low power enable output of FTDI chip (FT2232H56Q-U38)
FTDI_RXoutA35NONE (NONE)+3.3V_STBUART RXD of FTDI chip (FT2232H56Q-U38)
FTDI_TCKinA45UP (NONE)+3.3V_STBFTDI JTAG clock pin (FT2232H56Q-U38)
FTDI_TDIinA47UP (NONE)+3.3V_STBFTDI JTAG data input pin (FT2232H56Q-U38)
FTDI_TDOoutA48NONE (NONE)+3.3V_STBFTDI JTAG data output pin (FT2232H56Q-U38)
FTDI_TMSinB34NONE (NONE)+3.3V_STBFTDI JTAG mode select pin (FT2232H56Q-U38)
FTDI_TXinB27UP (NONE)+3.3V_STBUART TXD of FTDI chip (FT2232H56Q-U38)
I2C_SCL_CPLDinoutB32NONE (UP)+3.3V_STBI2C clock pin that connected to all temperature sensors and current sensor 
I2C_SDA_CPLDinoutA42NONE (UP)+3.3V_STBI2C data pin that connected to all temperature sensors and current sensor 
JTAGENinB30--- (DOWN)+3.3V_STBJTAG enable input pin of CPLD (Dip switch S4-1) If logical low, JTAG routed to FPGA. If logical high, CPLD access. 
MIO30 / MIO30_UART0_RXDoutA8NONE (NONE)+1.8VMIO30 pin of FPGA (XCZU11EG-1FFVC1760I- U30R)
MIO31 /MIO31_UART0_TXDinA9UP (NONE)+1.8VMIO31 pin of FPGA (XCZU11EG-1FFVC1760I- U30R)
MIO32 / MIO32_UART1_TXDinB8--- (NONE)+1.8V

MIO32 pin of FPGA (XCZU11EG-1FFVC1760I- U30R)
/currently_not_used

MIO33 / MIO33_UART1_RXDoutB7--- (NONE)+1.8V

MIO33 pin of FPGA (XCZU11EG-1FFVC1760I- U30R)
/currently_not_used

MRoutA26UP (UP)+3.3V_STBManual-reset that connected to MR pin of ultralow supply-current voltage monitor chip (TPS3106K33DBVR-U73)
NetU68_B2
B2---
/currently_not_used
PG_VCCINTinB23NONE (UP)+3.3V_STBPower good pin for +0.85V DC-DC converter (LTM4630EY-U42A)
PG+0.85V_GT_AVCC_PS/ PG_0V85_GT_AVCC_PS inB12NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator for +0.85V output voltage (TPS74801DRC-U45) 
PG+0.9V_GT_AVCC/ PG_0V9_GT_AVCCinA18NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  for +0.9V output voltage (LTM4644EY-U44)
PG+1.0V/ PG_1V0inB35NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +1.0V output voltage (TPS74801DRC-U13)
PG+1.2V_DDR/ PG_1V2_DDR inA33NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  for +1.2V output voltage (LTM4644EY-U53)
PG+1.2V_GT_AVTT/ PG_1V2_GT_AVTTinA11NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  for +1.2V output voltage (LTM4644EY-U48)
PG+1.2V_PLL_PS/ PG_1V2_PLL_PSinA28NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator for +1.2V output voltage (TPS74801DRC-U46)
PG+1.3V_MGT_PS/ PG_1V3_MGT_PSinA20NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  for +0.9V output voltage (LTM4644EY-U44)
PG+1.8V/ PG_1V8inB25NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  for +1.8V output voltage (LTM4644EY-U53)
PG+1.8V_AUX/ PG_1V8_AUXinA27NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +1.8V output voltage  (TPS74801DRC-U50)
PG+1.8V_AUX_PS/
PG_1V8_AUX_PS
inB10NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +1.8V output voltage  (TPS74801DRC-U51)
PG+1.8V_GT_AUX/ PG_1V8_GT_AUXinA13NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +1.8V output voltage  (TPS74801DRC-U49)
PG+1.8V_GT_AVTT_PS/ PG_1V8_GT_AVTT_PSinA16NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +1.8V output voltage  (TPS74801DRC-U54)
PG+2.5V_DDR/ PG_2V5_DDRinA32NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +2.5V output voltage  (TPS74801DRC-U55)
PG+2.5V_PL_DDR/ PG_2V5_PL_DDRinA38NONE (UP)+3.3V_STBPower good pin for 1.5A low-dropout linear regulator with +2.5V output voltage  (TPS74801DRC-U56)
PG+2V_MGT_PS/ PG_2V_MGT_PSinA1NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  for +2.0V output voltage (LTM4644EY-U48)
PG+3.3V/ PG_3V3inA23NONE (UP)+3.3V_STBPower good pin for quad DC-DC microModule regulator with configurable 4A output array  with +3.3V output voltage (LTM4644EY-U1)
PWR_BTNinA12UP (UP)+3.3V_STBPower button input (J40-Pin1)
PWR_STAT_GRNoutB24NONE (NONE)+3.3V_STBRed LED for power status display ( D11-Red)
PWR_STAT_REDoutA31NONE (NONE)+3.3V_STBGreen LED for power status display (D12-Green)
SRST_BinoutB5NONE (UP)+1.8VPS software reset (Active Low) (XCZU11EG-1FFVC1769I- U30S)
TCKoutA5NONE (NONE)+1.8VZynq JTAG clock pin (XCZU11EG-1FFVC1760I- U30S)
TDIoutB4NONE (NONE)+1.8VZynq JTAG data input pin (XCZU11EG-1FFVC1760I- U30S)
TDOinA6NONE (NONE)+1.8VZynq JTAG data output pin (XCZU11EG-1FFVC1760I- U30S)
THERM_NinA40--- (UP)+3.3V_STBOvertemperature termal shutdown pin of temperature sensors ( TMP461, U43,U47,U52,U57,U4) and temperature sensor with integrated fan control (LM96163-U61)  /currently_not_used
TMSoutA7NONE (NONE)+1.8VZynq JTAG mode select pin (XCZU11EG-1FFVC1760I- U30S)


Functional Description

JTAG

JTAG signals routed directly through the CPLD to FPGA. Access between CPLD and FPGA is multiplexed via JTAGEN pin of CPLD (B30) (logical one for CPLD, logical zero for FPGA).

CPLD JTAGEN (Dip switch S4-1)Description
0FPGA access
1CPLD access
CPLD access

Boot Mode

TEB0912 supports JTAG, QSPI and SD card boot modes. Boot mode depends on the logic state of  S2 dip switch pins that are connected with FPGA boot mode configuration pins.

S2-4S2-3S2-2S2-1Boot Mode
OFFOFFOFFOFFPS JTAG
OFFOFFONOFFQuad-SPI (32b)
ONONONOFFSD1 LS (3.0)
Boot Mode table

Power

In this board the CPLD is responsible for controlling and monitoring of output voltage and temperature of regulators and DC-DC converters. To control every converter chip or regualtor the CPLD monitors power good signal of regulators or DC-DC converters continuously to avoid over-voltage in the power system.

Enable SignalPower Good SignalSchematic PageInput power NetRegulator/ DC-DC ConverterDesignatorOutput power Net
EN+1.0VPG+1.0VPCIe_Switch_PWR+1.37VTPS74801DRCU13+1.0V
EN+2.5V_DDRPG+2.5V_DDR
PG+2.5V_PL_DDR
POWER3
POWER3
+3.3V
+3.3V
TPS74801DRC
TPS74801DRC
U55
U56
+2.5V_DDR
+2.5V_PL_DDR
EN+1.8VPG+1.8VPOWER3+12VLMT4644EYU54+1.8V
EN+1.2V_DDRPG+1.2V_DDRPOWER3+12VLMT4644EYU53+1.2V_DDR
EN+1.8V_AUX

PG+1.8V_AUX
PG+1.8V_GT_AUX
PG+1.8V_AUX_PS

POWER2
POWER2
POWER2
+2V_MGT_PS
+2V_MGT_PS
+2V_MGT_PS
TPS74801DRC
TPS74801DRC
TPS74801DRC
U50
U49
U51
+1.8V_AUX
+1.8V_GT_AUX
+1.8V_AUX_PS
EN+1.2V_PLL_PSPG+1.2V_PLL_PSPOWER1+1.37VTPS74801DRCU46+1.2V_PLL_PS
EN+0.85V_GT_AVCC_PSPG+0.85V_GT_AVCC_PSPOWER1+1.37VTPS74801DRCU45+0.85V_GT_AVCC_PS
EN+1.8V_GT_AVTT_PSPG+1.8V_GT_AVTT_PSPOWER3+2V_MGT_PSTPS74801DRCU54+1.8V_GT_AVTT_PS
EN+1.2V_GT_AVTTPG+1.2V_GT_AVTTPOWER2+12VLTM4644EYU48+1.2V_GT_AVTT
EN+5V_BIAS--POWER6+12VADP7102ACPZ-5.0-R7U58+5V_BIAS
EN+0.9V_GT_AVCC

PG+0.9V_GT_AVCC

POWER1+12VLTM4644EYU44+0.9V_GT_AVCC
EN+1.3V_MGT_PSPG+1.3V_MGT_PSPOWER1+12VLTM4644EYU44+1.37V
EN+2V_MGT_PSPG+2V_MGT_PSPOWER2+12VLTM4644EYU48+2V_MGT_PS
EN_VTT_DDR_PL
EN_VTT_DDR_PS
---
---
POWER4
POWER4
+3.3V
+3.3V
TPS51206DSQ
TPS51206DSQ
U2
U3
VTT_DDR_PL
VTT_DDR_PS
EN+3.3VPG+3.3VPOWER4+12VLTM4644EYU1+3.3V
EN_VCCINTPG_VCCINTPOWER0+12VLTM4630EYU42A+0.85V_VCCINT
PG and EN Signals


Power Sequencing State Machine



SequencePower Net NameCorrespondent Net Name on BoardRegulatorEnable SignalPG SignalDescription
1-----
VCC_PSINTLP
VCC_PSINTFP
VCCINT
-----
-----

+5V_BIAS 
+0.85V_VCCINT
+0.85V_VCCINT
+0.85V_VCCINT
+1.37V
+2V_MGT_PS

U58
U42
U42
U42
U44
U48
EN_5V_VBIAS
EN_VCCINT
EN_VCCINT
EN_VCCINT
EN_1V3_GT_PS
EN_2V0_GT_PS
----
PG_VCCINT
PG_VCCINT
PG_VCCINT
PG_1V3_GT_PS
PG_2V_MGT_PS
  • +5V_BIAS pin is connected to bias pin of +1.8V_GT_AUX , +1.8V_AUX, +1.8V_AUX_PS , +1.8V_GT_AVTT_PS , +0.85V_GT_AVCC_PS and +1.2V_PLL_PS regulator bias pins.
  • +1.37V pin is connected to regulator inputs for +0.85V_GT_AVCC_PS and +12V_PLL_PS voltages.
  • +2V_MGT_PS pin is connected to regulator inputs for +1.8V_AUX , +1.8V_GT_AUX , +1.8V_AUX_PS, +1.8V_GT_AVTT_PS voltages.
2

VCC_PSAUX
VCC_PSADC
VCCO_PSIO
VCC_PSPLL
VPS_MGTRAVCC
VCC_PSDDR_PLL
VCCINT_IO
VCCBRAM
VCCAUX
VCCAUX_IO
VMGTAVCC
----

+1.8V_AUX_PS
+1.8V
+1.8V
+1.2V_PLL_PS
+0.85V_GT_AVCC_PS
+1.8V_AUX_PS
+0.85V_VCCINT
+0.85V_VCCINT
+1.8V_AUX
+1.8V_AUX
+0.9V_GT_AVCC
+3.3V

U51
U53
U53
U46
U45
U51
U42
U42
U50
U50
U44
U1

EN_1V8_AUX
EN_1V8
EN_1V8
EN_1V2_PLL_PS
EN_0V85_GT_AVCC_PS
EN_1V8_AUX
EN_VCCINT
EN_VCCINT
EN_1V8_AUX
EN_1V8_AUX
EN_0V9_GT_AVCC
EN_3V3

PG_1V8_AUX
PG_1V8
PG_1V8
PG_1V2_PLL_PS
PG_0V85_GT_AVCC_PS
PG_1V8_AUX
PG_VCCINT
PG_VCCINT
PG_1V8_AUX
PG_1V8_AUX
PG_0V9_GT_AVCC
PG_3V3

  • 3.3V pin is connected to DDR regulator inputs. ( +2.5V_PL_DDR , +2.5V_DDR , VTT_DDR_PS and VTT_DDR_PL)


3VPS_MGTRAVTT
VCCO_PSDDR
VMGTAVTT
+1.8V_GT_AVTT_PS
+1.2V_DDR
+1.2V_GT_AVTT
U54
U53
U48
EN_1V8_GT_AVTT_PS
EN_1V2_DDR
EN_1V2_GT_AVTT

PG_1V8_GT_AVTT_PS
PG_1V2_DDR
PG_1V2_GT_AVTT

  • +1.2V_DDR is connected to DDR_PL and DDR_PS regulator inputs.
4---- 
---- 
----
VTT_DDR_PL , VTT_DDR_PS
+2.5V_PL_DDR , +2.5V_DDR
+1.0V

U2,U3
U55,U56
U13

EN_VTT_DDR
EN_2V5_DDR
EN_1V0
----  
PG_2V5_DDR , PG_2V5_PL_DDR
PG_1V0
  • +1.0V is for PCIe switch.
Power sequencing table

I2C

The main interface in the system is I2C interface. The user can input the data in the system through i2c slave subsystem. The entered data is stored in RAM memory. The state machine reads the stored data and communicates with corresponding sensor through i2c master subsystem and stores the feedback data again in RAM memory. The user can read back reported data for example temperature value.


I2C
Internal Registers

Ram memory is a 16x8 Byte Memory.

Register NameRegister addressBitsCPLDFPGA
config_reg0x00
76543210
00000read_bitwrite_bitstart_bit
ReadWrite
sensor_addr0x018-bitsReadWrite
pointer_reg_byte0x028-bitsReadWrite
data_to_write0x038-bitsReadWrite
Reserved0x048-bits

Reserved0x058-bits

Reserved0x068-bits

Reserved0x078-bits

state register0x08


76543210
0000000data_trans_busy
WriteRead
data_to_read0x098-bitsWriteRead
Reserved0x0A8-bits

Reserved0x0B8-bits

Reserved0x0C8-bits

Reserved0x0D8-bits

Reserved0x0E8-bits

Reserved0x0F8-bits

Registers

The memory consists of the following registers:

  • config_reg
  • sensor_addr
  • pointer_reg_byte
  • data_to_write
  • state_reg
  • data_to_read

Sensor_addr register consists of sensor address that the temperature should be read from. Pointer_reg_byte is sensor internal register address that is to be written to or read from. Data_to_write register consists of data that in pointer_reg_byte will be written.  The readed data  from sensor is saved in data_to_read register. As long as state machine is busy , it will be state_teg value equal to 0x01. Config_reg consists of control bits. To start data transfer in state machine start_bit must be set to 1. If write_bit set to one, the inhalt of data_to_write will be written in pointer_reg_byte register of sensor . To read the inhalt of pointer_reg_byte register of sensor the read_bit must be set to 1.

Transfer state machine

To manage data transfer between RAM memory and i2c master subsystem that is connected with sensors, it is necessary to design a state machine. This state machine will be controlled with control bits of config_reg register. If start_bit is activated, state machine begins to transfer data between RAM memory and i2c master subsystem. If write_bit is set to one,  saved data in RAM memory will be written in temperature sensor. If read_bit is set to one, temperature value will be readed from sensor and will be saved in RAM memory. Every state in the state machine consists of a state machine to manage i2c master communications.

In the following diagram this state machine construction is shown:

Data Transfer State Machine

Sensors on board
Sensor NameSensor I2C addressconnectionDescriptionChip NameDescription
+12V, Current sensor0x40CPLDCurrently not suppportedINA219For more information refer to Datasheet
Temperature sensor of +0.85V_VCCINT DC-DC0x48CPLDSupportedTMP461For more information refer to Datasheet
Temperature sensor of DDR power and +1.8V0x4ACPLDSupportedTMP461---
Temperature sensor of +3.3V0x4BCPLDSupportedTMP461---
Temperature sensor with integrated fan controller0x4CCPLDSupportedTMP461---
Temperature sensor of +1.2V_GT_AVTT0x4DCPLDSupportedTMP461---
Temperature sensor of +0.9V_GT_AVCC0x4ECPLDSupportedTMP461---
Sensors


All temperature sensors are TMP461 of texas instruments. When this sensor  is in shutdown mode, a single conversion is started by writing  any value in one_shot_start register ( poniter address 0x0F). The device returns to shutdown mode when the conversion and cycle completes. The result value is saved in high and low byte of  Local/ Remote temperature registers. The high byte consists of temperature integer value and low byte consists of fraction part of temperature value. (Pointer addresses 0x00,0x15 for local temperature register and pointer addresses 0x01,0x10 for remote temperature register). The channel enable register (read address 16h, write address 16h) enables or disables the temperature conversion of remote and local temperature sensors. LEN (bit 0) of the channel enable register enables/disables the conversion of local temperature. REN (bit 1) of the channel enable register enables/disables the conversion of remote temperature. Both LEN and REN are set to 1 (default), this enables the ADC to convert both local and remote temperatures. 

The TMP461 device is a digital temperature sensor that combines a local temperature measurement channel and a remote-junction temperature measurement channel in a single WQFN-10 package. The device is two-wire and SMBus-interface-compatible with nine pin-programmable bus address options, and is specified over a temperature range of –40°C to 125°C. The TMP461 device also contains multiple registers for programming and holding configuration settings, temperature limits, and temperature measurement results. In the following it is listed important registers of this sensor:

  • STATUS REG---------------------------------------Addr ---> 0x02  (read only)  (Default N/A)

  • Local temperature register MSB 8 bits---------Addr ---> 0x00  (read only)  (Default 0x00)

  • Local temperature register LSB 4 bits----------Addr ---> 0x15  (read only)  (Default 0x00)

  • Remote temperature register MSB 8 bits------Addr ---> 0x01  (read only)  (Default 0x00)

  • Remote temperature register LSB 4 bits-------Addr ---> 0x10  (read only)  (Default 0x00)

  • Configuration register---------------------------Addr ---> 0x03  (read/write) (Default 0x00)

  • Channel enable register-------------------------Addr ---> 0x16  (read/write) (Default 0x03)

  • Conversion rate register------------------------Addr ---> 0x04  (read/write) (Default 0x08)

  • One-shot start register--------------------------Addr ---> 0x0F  (read/write) (Default N/A)

The INA219 is a high-side current shunt and power monitor with an I2C interface. The INA219 monitors  both shunt drop and supply voltage, with  programmable conversion times and filtering. A programmable calibration value, combines with an internal multiplier, enables direct readouts in amperes. An additional multiplying register calculates  power in watts. The I2C interface features 16 programmable accesses.

To access these sensors through ZynqMP can be executed the following instructions in linux console consecutively:

  1. Write device address
    • i2cset -y 2 0x20 0x01 <sensor address>    --> This command writes sensor address in RAM memory address 0x01 (sensor_addr register)
  2. Write register address
    • i2cset -y 2 0x20 0x02 <register address>  --> This command writes desired register address in RAM memory address 0x02 (pointer_reg_byte register) 
  3. Write data that should be written in the register
    • i2cset -y 2 0x20 0x03 <data to write>     --> This command writes desired value in RAM memory address 0x03 (data_to_write register)
  4. Start to write data
    • i2cset -y 2 0x20 0x00 0x03                --> This command set write_bit to one. (Write command)    
  5. Stop writing data
    • i2cset -y 2 0x20 0x00 0x00                --> This command stops writing in RAM memory.
  6. Start to read data
    • i2cset -y 2 0x20 0x00 0x05                --> This command set read_bit to one. (Read command)
  7. Stop reading data
    • i2cset -y 2 0x20 0x00 0x00                --> This command stops reading from RAM memory.
  8. Read data_to_read register
    • i2cget -y 2 0x20 <data to read>           --> This command reads data from desired register.

For example to read a temperature sensor it is necessary to give the following commands in linux console:

  • i2cset -y 2 0x20 0x01 <sensor address>    --> Writing device address
  • i2cset -y 2 0x20 0x02 0x0F                --> Writing One-shot register address
  • i2cset -y 2 0x20 0x03 0xFF                --> Writing any value in the register to start converting of ADC in sensor
  • i2cset -y 2 0x20 0x00 0x03                --> Start to write these values
  • i2cset -y 2 0x20 0x00 0x00                --> To turn i2c master data transfer off
  • i2cset -y 2 0x20 0x02 0x00                --> Writing address of local temperature high byte register that consists of the temperature value
  • i2cset -y 2 0x20 0x00 0x03                --> Start to write these values
  • i2cset -y 2 0x20 0x00 0x00                --> To turn i2c master data transfer off
  • i2cset -y 2 0x20 0x00 0x05                --> Start to read temperature value of sensor and save it in data_to_read register
  • i2cset -y 2 0x20 0x00 0x00                --> To turn i2c master data transfer off
  • i2cget -y 2 0x20 0x09                     --> Reading temperature value from data_to_read register
  • i2cset -y 2 0x20 0x02 0x15                --> Writing address of local temperature low byte register that consists of fraction of the temperature value
  • i2cset -y 2 0x20 0x00 0x03                --> Start to write these values
  • i2cset -y 2 0x20 0x00 0x00                --> To turn i2c master data transfer off
  • i2cset -y 2 0x20 0x00 0x05                --> Start to read temperature value of sensor and save it in data_to_read register
  • i2cset -y 2 0x20 0x00 0x00                --> To turn i2c master data transfer off
  • i2cget -y 2 0x20 0x09                     --> Reading temperature fraction value from data_to_read register

If the following shell script is executed in linux console it can be read all temperatures of all temperature sensors on the board. This script file will be executed automatically while booting, if this file is copied to SD card.

init.sh
#!/bin/sh

set sensor_addr=0                       # Temperature = Temp+Fraction*16^-1 °C for example 50+1*16^-1 = 50.0625 °C 
Temp=0                                  # 8bits
Fraction=0                              # 4bits                                          
i=0
n1=0
n2=0
for sensor_addr in 0x48 0x4A 0x4B 0x4C 0x4D 0x4E
do
        echo "Sensor Address $sensor_addr:"
        echo "Reading Sensor $i:"
        i2cset -y 2 0x20 0x01 $sensor_addr          # Write sensor address in RAM memory address 0x01
        i2cset -y 2 0x20 0x02 0x0F                  # Write one-shot-start register address in 0x02 of RAM
        i2cset -y 2 0x20 0x03 0xFF                  # Write 0xFF value in 0x03 address of RAM
        i2cset -y 2 0x20 0x00 0x03                  # Writing in sensor
        i2cset -y 2 0x20 0x00 0x00                  # Stop writing
        i2cset -y 2 0x20 0x02 0x00                  # Write 0x00 value (local temperature register high byte address) in 0x02 of RAM memory
        i2cset -y 2 0x20 0x00 0x03                  # Writing in sensor
        i2cset -y 2 0x20 0x00 0x00                  # Stop writing
        i2cset -y 2 0x20 0x00 0x05                  # Reading sensor
        i2cset -y 2 0x20 0x00 0x00                  # Stop reading
        Temp=`i2cget -y 2 0x20 0x09`                # Read temperature value stored in 0x09 address of RAM memory
        #echo $Temp
        n1=$(($Temp))
        #echo $n1
        i2cset -y 2 0x20 0x02 0x15                  # Write 0x15 value (local temperature register low byte address) in 0x02 of RAM memory
        i2cset -y 2 0x20 0x00 0x03                  # Writing in sensor
        i2cset -y 2 0x20 0x00 0x00                  # Stop writing
        i2cset -y 2 0x20 0x00 0x05                  # Reading sensor
        i2cset -y 2 0x20 0x00 0x00                  # Stop reading
        Fraction=`i2cget -y 2 0x20 0x09`            # Read temperature value stored in 0x09 address of RAM memory
        #echo $Fraction
        n2=$((Fraction>>4))                         # Shift bits 4 times            
        #echo $n2      
        echo "-----------------------------"
        #printf "Sensor %d Temperature = %d Celsius \n" $i $Temp
        #printf "Sensor %d Fraction = %d \n" $i $Fraction
        echo "Sensor $i Temperature = "
        awk "BEGIN {print  $n1+$n2*16**-1}"   
        echo "Celsius"
        echo "-----------------------------"
        let i++
done


LED

Green LED

StateBlink sequenceComment
IDLEOFFPower sequencing can not be started. Power button is not pushed or is not pushed correctly.
STAGE1ooooooo*

The following power good signals are faulty.
PG_VCCINT
PG_1V3_MGT_PS
PG_2V_MGT_PS

STAGE2oooooo**

The following power good signals are faulty. The error may be due to a problem in a corresponding DC-DC converter or regulator.
PG_0V9_GT_AVCC
PG_0V85_GT_AVCC_PS
PG_1V2_PLL_PS
PG_1V8
PG_3V3
PG_1V8_AUX
PG_1V8_AUX_PS
PG_1V8_GT_AUX

STAGE3ooooo***

The following power good signals are faulty. The error may be due to a problem in a corresponding DC-DC converter or regulator.
PG_1V2_DDR
PG_1V8_GT_AVTT_PS
PG_1V2_GT_AVTT

STAGE4oooo****The following Power good signals are faulty.The error may be due to a problem in a corresponding DC-DC converter or regulator.

PG_2V5_DDR
PG_2V5_PL_DDR
PG_1V0

WAIT_RDY********The state machine remains in this stage as soon as a counter is not overflowed. After overflowing the counter the state machine  will jump in the next stage.
RDYONPower is ok and the FPGA is configured successfully.
Green LED States


RED LED

StatusBlink sequenceComment
pg_all = '0'********One of the power good signals are faulty. The error may be due to a problem in a DC-DC converter or regulator.
MR = '0'*****oooReset button is pushed.
SRST_B ='0'****ooooPS software reset (Active Low) is activated.
FPGA_DONE ='0'***oooooFPGA PL is not configured.
FPGA_DONE ='0'**ooooooFPGA PL is not configured.
FTDI_PWR_EN_N='1'*oooooooFTDI chip USB SUSPEND mode or device has not been configured.
elseOFF
Red LED States

Appx. A: Change History and Legal Notices

Revision Changes

  • Changes REV02 to REV03:
    • Added i2c slave to communicate with FPGA

    • Added i2c master to read and write temperature sensors  value

    • Added i2c master state machine to manage communication between CPLD and temp. sensors  

    • Added a 8x16 byte RAM to save data in RAM 

    • Correction of power sequencing
  • Changes REV01 to REV02:
    • Power Management
    • FAN enable
    • LED blink sequencing
  • Changes REV00 to REV01:
    • Power on (min)
    • UART
    • JTAG

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

DateDocument RevisionCPLD Firmware RevisionSupported PCB RevisionAuthorsDescription

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REV03REV02, REV03

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  • REV03 release
  • Firmware release (SC-PGM-TEB0912-0302_SC0912-03_20210622.zip)
2021-02-16v.39REV02REV02, REV03Mohsen Chamanbaz
  • REV02 release
  • Firmware release (SC-PGM-TEB0912-02_SC0912-02_20191127.zip)

All

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Legal Notices

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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