Table of Contents
The Trenz Electronic TE0714 is an industrial-grade SoM (System on Module) based on Xilinx Artix-7, 16 MByte Flash memory and powerful switching mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking strips. TE0714 is the smallest module with transceiver (3 x 4 cm).
Refer to http://trenz.org/te0714-info for the current online version of this manual and other available documentation.
Xilinx Artix-7 FPGA (A15T, A35T, A50T)
- Rugged for shock and high vibration
- 16 MByte QSPI Flash memory
- Differential MEMS oscillator for MGT clocking
- MEMS oscillator for PL clocks (Optional)
- Plug-on module with 2 × 100-pin high-speed hermaphroditic strips
- 138 FPGA I/O's (Max 68 differential)
5 IO's (QSPI or user I/O's)
- XADC analog input
- 4 GTP (high-performance transceiver) lanes
- GT reference clock inputs
- Optimized I/O and power pins for good signal integrity
- On-board high-efficiency DC-DC converters
- Power supply for all on-board components
- eFUSE bit-stream encryption (AES)
- One user configurable LED
Different configurations for cost and performance optimization available upon request. Available options are:
- FPGA Type (A15T, A35T, A50T), temperature grade
- GT clock frequency (or none if not implemented)
- PL clock frequency and precision (or none if not implemented)
- Config and B14 bank Voltage: 1.8V or 3.3V
- SPI Flash type (or none if not implemented)
- LED Color (or none if not implemented)
- PUDC Pin strapping (pull high or pull down)
- GT power enable pin strapping (default power enabled or disabled)
- Xilinx Artix-7 FPGA (XC7A series), U4
- 16 MByte SPI Flash, U7
- B2B connector Samtec Razor Beam™ LSHM-150, JM2
- B2B connector Samtec Razor Beam™ LSHM-150, JM1
- 25 MHz oscillator, U8
- Single output low-dropout linear regulator (1.2V_MGT), U6
- Single output low-dropout linear regulator (1.0V_MGT), U5
- Low-jitter precision LVDS 125 MHz oscillator (GT Clock), U2
- Red indication LED, D4
- Step-down DC-DC converter (1.0V), U1
- PFET load switch with configurable slew rate (3.3V), Q1
- Low-power step-down DC-DC converter (1.8V), U3
- Voltage detector for circuit initialization and timing supervision, U23
Initial Delivery State
Storage device name
SPI Flash OTP Area
Empty, not programmed
Except serial number programmed by flash vendor
SPI Flash Quad Enable bit
SPI Flash main array
high or open
Master SPI, x4 Mode
low or ground
|PROG_B||input||pulsed low||Clear FPGA configuration (falling edge) and initiate a new configuration sequenz (next rising edge).|
|DONE||output||high||Completion of configuration sequence.|
SPI FPGA pins D02 and D03 have no pull-ups on the module, so with PUDC=High option, those pins are floating if there are no pull-ups on baseboard. As those pins have SPI RESET function when Quad mode is not enabled, it is mandatory to either add pull-ups on user baseboard or program the Quad Enable bit in Flash nonvolatile status register.
Signals, Interfaces and Pins
JTAG access to the Xilinx Artix-7 FPGA device is provided through connector JM1.
Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
|FPGA Bank||B2B Connector||I/O Signal Count||Voltage Level||Notes|
|14||JM2||36||VCCIO_0||NB! 17 LVDS pairs possible.|
|15||JM2||48||VCCIO15||Supplied by the baseboard.|
|34||JM1||48||VCCIO34||Supplied by the baseboard.|
|4 x GTP lanes.|
Please refer to the Pin-out tables page for additional information.
Quad SPI Flash
On-board SPI flash memory S25FL127S (U7) is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the bus width and clock frequency used.
SPI Flash QE (Quad Enable) bit must be set to high or FPGA is unable to load its configuration from flash. By default this bit is set to high at the manufacturing plant.
There is one LED on TE0714 module.
|Frequency depends on the module variant. Output is compatible to 3.3V and 1.8V I/O standard of the FPGA bank.|
Frequency depends on the module variant
Power and Power-On Sequence
To power-up a module, power supply with minimum current capability of 1A is recommended.
TE0714 needs one single power supply with nominal of 3.3V.
|Test Condition (25 °C ambient)||VIN Current mA||Notes|
|TE0714-35, TEBT0714, empty design, GT not enabled||110mA|
Actual power consumption depends on the FPGA design and ambient temperature.
Power Distribution Dependencies
There is no specific or special power-on sequence, single power source is needed as VIN, rest of the sequence is automatic.
Voltages on B2B-
|VIN||98, 100||-||input||supply voltage|
|VCCIO_0||-||54||input||high range bank voltage|
|VCCIO_15||-||53||input||high range bank voltage|
|VCCIO_34||62||-||input||high range bank voltage|
|3.3V||84||-||output||internal 3.3V voltage level|
|1.8V||-||17||output||internal 1.8V voltage level|
0 Config and B14
1.8V or 3.3V
|Depends on module assembly variant. See R21, R22 and R27 assembly option*|
Supplied from baseboard via B2B connector, max 3.3V
|Supplied from baseboard via B2B connector, max 3.3V|
- *R21 assembled: 3.3V and B2B is output if R27 is assembled
- *R22 assembled 1.8V and B2B is output if R27 is assembled
- *R21 and R22 not assembled , B2B is input and carrier defines voltage → pay attention on assembled flash!
Board to Board Connectors
These connectors are hermaphroditic. Odd pin numbers on the module are connected to even pin numbers on the baseboard and vice versa.
3 x 4 modules use two Samtec Razor Beam LSHM connectors on the bottom side.
- 2 x REF-189016-02 (compatible to LSHM-150-04.0-L-DV-A-S-K-TR), (100 pins, "50" per row).
When using the same type on baseboard, the mating height is 8mm. Other mating heights are possible by using connectors with a different height.
|Order number||Connector on baseboard||compatible to||Mating height|
The module can be manufactured using other connectors upon request.
Connector Speed Ratings
The LSHM connector speed rating depends on the stacking height; please see the following table:
|Stacking height||Speed rating|
|12 mm, Single-Ended||7.5 GHz / 15 Gbps|
|12 mm, Differential|
6.5 GHz / 13 Gbps
|5 mm, Single-Ended||11.5 GHz / 23 Gbps|
|5 mm, Differential||7.0 GHz / 14 Gbps|
Current rating of Samtec Razor Beam™ LSHM B2B connectors is 2.0A per pin (2 adjacent pins powered).
Connector Mechanical Ratings
- Shock: 100G, 6 ms Sine
- Vibration: 7.5G random, 2 hours per axis, 3 axes total
Absolute Maximum Ratings
VIN supply voltage
|HR I/O banks supply voltage (VCCO)||-0.5||3.6||V||Xilinx datasheet DS181|
|HR I/O banks input voltage||-0.4||VCCO + 0.55||V||Xilinx datasheet DS181|
|GTP transceivers Tx/Rx input voltage||-0.5||1.26||V||Xilinx datasheet DS181|
Voltage on module JTAG pins
|VCCO_0 + 0.55|
|Xilinx datasheet DS181|
Recommended Operating Conditions
Module size: 40 mm × 30 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 8 mm
PCB thickness: 1.6 mm
Highest part on PCB: approximately 2.5 mm. Please download the step model for exact numbers.
All dimensions are shown in mm. Additional sketches, drawings and schematics can be found here.
Variants Currently In Production
On REV 01 JM2 Pin 54 was connected to GND. When R27 is not populated, REV 02 is backwards compatible to REV 01. When R27 is set, check your baseboard to not connect this pin to GND. For all new baseboards JM2.54 should be used as VCCIO output (it will then be 1.8V or 3.3V depending the voltage settings on the module.
Hardware Revision History
Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Document Change History
|Martin Rohrmüller||Corrected clock net designator in table.|
Thorsten Trenz, Emmanuel Vassilakis
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