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Description for the newest Design Version

  • TE0803 Test Board

    • Vitis/Vivado 2022.2

    • QSPI

    • Custom Carrier (minimum PS Design with available module components only)

    • Modified FSBL (some additional outputs only)

  • TE0803 StarterKit
    • Vitis/Vivado 2022.2
    • TEBF0808
    • PetaLinux
    • USB
    • ETH
    • MAC from EEPROM
    • PCIe
    • SATA
    • SD
    • I2C
    • RGPIO
    • Display Port (DP)
    • user LED access
    • Modified FSBL for Si5338 programming
  • TE0803 SK0803_SDSoC
    Basic SDSoC enabled design. Derived from TE0803 StarterKit by adding SDSoC requirements.

Basic Documentation and Notes

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