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Table of Contents
Overview
The Trenz Electronic TE0xxx-xx ... is an industrial-grade ... module ... based on Xilinx ...
Refer to http://trenz.org/tec0850-info for the current online version of this manual and other available documentation.
Key Features
Carrier for 4x5 modules
LPC FMC
- SFP+ connector
- PCIe x1
- SATA connector
- RJ45 Gigabit Ethernet connector
- micro-usb to JTAG/UART bridge
- 2x Firefly connectors
- micro usb connector
- micro SD card connector
- 4x LED (2User, Power and Status)
- Module reset button
- 10x user dip
MAX10 CPLD
Block Diagram
Main Components
- ANSI/VITA 57.1 compliant FMC LPC connector, J1
- Cooling fan 5VDC M1 (45X5MM, 0.7W, 1.06CFM), M1
- SFP+ connector, J12
- PCIe x1 connector, J3
- SATA connector, J31
- Trenz Electronic 4 x 5 modules B2B connectors, JB1 ... JB3
- RJ45 Gigabit Ethernet connector, J9
- 2x Firefly arrangement of connectors, J11, J13, J14, J18
- Micro-USB2 connector, J10
- FTDI FT2232H USB2 to JTAG,UART/FIFO Bridge, U4
- Micro-USB2 connector, J16
- MAX10 10M08SAU169C8G CPLD, U11
- 6-pin 12V power connector, J15
- 6x1 JTAG pin header (not fitted)
- 3x1 jumper pin header (select VCCIOA), J4
- 3x1 jumper pin header (select VCCA_SD), J7
- 2x1 pin header (VBAT), J6
- 2x5 1,27mm pitch pin header (PJTAG), J19
- Push button, S1
- 10x dip switch, S2, S3
- DCDC LMZ23605TZ @5.0V (5V0PER), U15
- DCDC LMZ23605TZ @5.0V (5V0), U9
- DCDC LMZ23605TZ @3.3V(3V3IN), U10
- 2x green LED (user), D1, D2
- green LED (Power), D3
- green LED (Status), D4
- SD-Card connector (top loader),
- DCDC EN5335QI (FMC_VADJ), U1
- DCDC EN6338QI @3.3V (3V3FMC), U14
- SDIO Level shifter TXS02612, U3
Initial Delivery State
Storage device name | Content | Notes |
---|---|---|
FTDI chip configuration EEPROM (93AA56B), U6 | Xilinx License | Do not overwrite, see warning in related section |
MAX10 System Controller CPLD (10M08SAU169C8G), U14 | SC CPLD Firmware |
Control Signals
To get started with TEF1002 board, some basic control signals are essential and are described in the following table:
Control signal | Switch / Button / LED / Pin | Signal Schematic Names | Connected to | Functionality | Notes |
---|---|---|---|---|---|
FMC_VADJ voltage selection | DIP switches S2-1, S2-2, S2-3 | VID0 ... VID2 | SC CPLD U11, pins K6, J5, K5 | sets adjustable voltage for FMC connector | dependens on SC CPLD configuration |
JTAG enable | DIP switch S2-4 | JTAGEN | SC CPLD U11, pin E5 | OFF: TEF1002 SC CPLD JTAG enabled, | - |
Module JTAG select | DIP switch S2-5 | M_JTAGEN | B2B JB1, pin 90 | When S2-4 ON and S2-6 OFF: OFF: Module SC CPLD JTAG enabled, ON: Module SOC JTAG enabled | - |
FMC JTAG select | DIP switch S2-6 | FMC_JTAG | SC CPLD U11,L3 | When S2-4 ON: OFF: TEF1002 SC CPLD JTAG enabled, ON: FMC JTAG enabled | dependens on SC CPLD configuration, only avialiable when 4x5 module installed |
Enable module power | DIP switch S2-7 | CM0 | SC CPLD U11, M3 | Module power. Set ON to enable module power. (Power management depends on module. ) | dependens on SC CPLD configuration, only avialiable when 4x5 module installed |
No sequenzing | DIP switch S2-8 | CM1 | SC CPLD U11, L2 | Module Power management. Set ON to disable module CPLD power management. Power management depends on module and not all modules support extended power management with CPLD. | dependens on SC CPLD configuration, only avialiable when 4x5 module installed |
Boot Mode | DIP switch S3-1 | CM2 | SC CPLD U11, K2 | Boot Mode for attached module (Default: OFF for primary SD boot and ON for primary QSPI boot. Depends also on module CPLD firmware). | dependens on SC CPLD configuration, only avialiable when 4x5 module installed |
FMC VADJ enable | DIP switch S3-2 | USR0 | SC CPLD U11, K1 | ON: FMC VADJ enable also without installed FMC Card OFF: FMC_FADJ only enabled when FMC installed. | dependens on SC CPLD configuration, only avialiable when 4x5 module installed |
Reset | Push button S1 | BUTTON | SC CPLD U11, N6 | Module Reset, Low active module reset. Pin force Power one reset on FPGA/SoC. | dependens on SC CPLD configuration |
2x User LED | Green LEDs D1, D2 | LED1, LED2 | SC CPLD U11, J5, K5 | Depends on User configuration, curenntly both off, if not otherwise programmed. | dependens on SC CPLD configuration |
Board power indicator | Green LED D3 | 3V3IN | B2B JB1, pin 14, 16 | ON: 3.3V on-board voltage available | - |
Board status indicators | Green LED D4 | - | SC CPLD U11, pin C2 | ON: No failure. For other blinking status of this LED please refer to SC Firmware description. | dependens on SC CPLD configuration |
Enable module power | SC CPLD U11, D11 | EN1 | B2B JB1, pin 27 | Module power. (Power management depends on module. ) | - |
No sequenzing | SC CPLD U11, E13 | NOSEQ | B2B JB1, pin 8 | Power management depends on module and not all modules support extended power management with CPLD. | - |
Boot Mode | SC CPLD U11, B11 | MODE | B2B JB1, pin 31 | Boot Mode for attached module. LOW for primary SD boot and HIGH for primary QSPI boot. (Depends also on module CPLD firmware). | - |
Module Reset | SC CPLD U11, E12 | RESIN | B2B JB2, pin 17 | Module Reset | - |
Signals, Interfaces and Pins
Board to Board (B2B) I/Os
I/O signals connected to the B2B connector:
B2B Connector | Interfaces | I/O Signal Count | Notes |
---|---|---|---|
JB1 | User IO | 15 single ended or 7 differential | TEF1002 CPLD |
16 single ended or 8 differential | FFA | ||
16 single ended or 8 differential | FFB | ||
MIO/PJTAG/User IO | 4 | Pinheader J19 | |
CPLD IO | 2 | Module CPLD IO to Carrier CPLD | |
SD IO | 6 | - | |
UART | 2 | - | |
GbE PHY_MDIO + PHY_COM | 8 +1 | - | |
Module Control | 5 | NOSEQ,, EN1, PGOOD, MODE, M_JTAGEN | |
JB2 | User IO | 12 single ended or 6 differential | LPC FMC |
MGTs (RX+TX) | 4 | PCIe x1, SFP+, LPC FMC, SATA | |
MGTCLK | 1 differential | - | |
CLK | 1 differential | - | |
USB | 2 | OTG-D_P, OTG-D_N | |
USB Control | 3 | OTG-ID | |
JB3 | User IO | 56 single ended or 28 differential | LPC FMC |
CLK | 2 differential | M2C | |
JTAG | 4 | - |
FMC LPC Connector
I/O signals and interfaces connected to the FPGA SoCs I/O bank and FMC connector J1:
FMC Connector J2 Pins and Interfaces | I/O Signal Count | LVDS-pairs count | Connected to | VCCIO voltage | Notes |
---|---|---|---|---|---|
I/O | 56 | 28 | B2B JB2 connector | FMC_VADJ | pins usable as single ended I/O's or LVDS pairs |
12 | 6 | B2B JB3 connector | FMC_VADJ | ||
Multi Gigabit Transceiver | - | 2 | B2B JB3 connector | - | RX, TX |
Gigabit Transceiver Clock | - | 1 | B2B JB3 connector | - | |
I²C (SDA, SCL) | 2 | - | SC CPLD U11, pin F9, J8 | - | FMC I²C Geographical Address pins GA0 and GA1 set to GND. |
JTAG | 4 | - | SC CPLD U11, pin M7, N7, M8, F8 | 3.3V | - |
Clock Input | - | 2 | B2B JB3 connector | - | 2x reference clock inputs |
Control Signals | 2 | - | SC CPLD U11, pin M5, E9 | - | 'PG_C2M', 'FMC_PRSNT' |
Reference voltage (FMC_VREF) | - | - | - | - | Not Connected. |
SFP+ Interface
Connector J12 Pins and Interfaces | I/O Signal Count | LVDS-pairs count | Connected to | VCCIO voltage | Notes |
---|---|---|---|---|---|
Multi Gigabit Transceiver | - | 2 | B2B JB3 connector | - | RX, TX |
Control | 6 | SC CPLD U11 | 3V3_PER | TX_FAULT, TX_DIS, M-DEF0, RS0, RS1, LOS | |
I²C (SDA, SCL) | 2 | - | SC CPLD U11, pin F9, J8 | - | MUX via CPLD |
Firefly like connectors
Connector J12 Pins and Interfaces | I/O Signal Count | LVDS-pairs count | Connected to | VCCIO voltage | Notes |
---|---|---|---|---|---|
Multi Gigabit Transceiver | - | 2 | B2B JB3 connector | - | RX, TX |
Gigabit Transceiver Clock | - | 1 | B2B JB3 connector | - | |
I²C (SDA, SCL) | 2 | - | SC CPLD U11, pin F9, J8 | - | FMC I²C Geographical Address pins GA0 and GA1 set to GND. |
JTAG | 4 | - | SC CPLD U11, pin M7, N7, M8, F8 | 3.3V | - |
Clock Input | - | 2 | B2B JB3 connector | - | 2x reference clock inputs |
Control Signals | 2 | - | SC CPLD U11, pin M5, E9 | - | 'PG_C2M', 'FMC_PRSNT' |
Reference voltage (FMC_VREF) | - | - | - | - | Not Connected. |
microUSB JTAG/UART/FIFO Interface
The microUSB connector provides JTAG access through the carriers USB to JTAG/UART/FIFO bridge. JTAG is routed for MUX and CPLD JTAG access to the CPLD. UART signals are connected to the module B2B connectors. For further description of the JTAG MUX see Dip switches or SC CPLD Firmware. For non-standard functionalitiers compare on-board Peripherals and datasheet of FTDI FT2232H.
microUSB
RJ45 - Ethernet
On-board Peripherals
Subsections...
Power and Power-On Sequence
Power Consumption
Power Distribution Dependencies
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Power-On Sequence
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Voltage Monitor Circuit
Power Rails
Bank Voltages
Board to Board Connectors
Technical Specifications
Absolute Maximum Ratings
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
Recommended Operating Conditions
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
Physical Dimensions
Variants Currently In Production
Trenz shop TE0xxx overview page | |
---|---|
English page | German page |
Revision History
Hardware Revision History
Date | Revision | Note | PCN | Documentation Link |
---|---|---|---|---|
- | 01 | Prototypes | - | - |
Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Document Change History
Date | Revision | Contributor | Description |
---|---|---|---|
| |||
-- | all |
|
Disclaimer
Data Privacy
Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy
Document Warranty
The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.
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Technology Licenses
The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.
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REACH, RoHS and WEEE
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Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.
WEEE
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Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.
Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.