TEF1001 CPLD Firmware

TEF1001 CPLD Access

Use TE0790 with TE0791 Adapter
- TE0790 Standard Firmware
- TE0790 DIP 1:ON,2OFF,3:OFF,4ON
- Use TE0791 J8 Pin Header
Connect TE0791 J8 to TEF1001 J8 on Bottom (TE0790 USB Connector must look away from TEF1001)
- TEF1001 J8 Pinout:1:TMS,2:TDI,3:TDO,4:TCK,5:GND,6:3.3V

TEF1001 CPLD - Firmware description for PCB Revision 02 and newer
- Default delivered Firmware
TEF1001-REV01 CPLD - Firmware description for PCB Revision 01
- Default delivered Firmware

TEF1001/<PCB Revision>/Firmware/
- Use files from the subfolders of your PCB revision

Lattice Diamond or Lattice Diamond Programmer is available for free on http://www.latticesemi.com/
Lattice compatible JTAG Programmer, for example:
- Trenz TE0790 or Carrier with FTDI for JTAG
- Most JTAG programmer, which used FTDI Chip to translate USB to JTAG
  - Digilent FTDI based programmer are not compatible with Lattice.
JTAG must be connected to CPLD JTAG
JTAG Enable Pin of CPLD must be selectable and set to VDD
Correct CPLD Firmware (JED-File) from Trenz Electronic Download

Important:

Connect only one JTAG device to host PC.
Close all other JTAG programs, like Xilinx tools (on WinOS check hw_server.exe is terminated).

Procedure:

Enable CPLD JTAG access (See JTAG section on CPLD Firmware description)
Connect JTAG
Power on System
Open Lattice Diamond Programmer
Detect Cable and click "Ok"
For some devices second Port must be selected:
Select Device (See CPLD Firmware overview description).
In the most cases select the correct detected device one time (it's yellow at first on the menue)
Select correct Firmware from Download Area (JED File)
Program CPLD:
Disable CPLD JTAG access (See JTAG section on CPLD Firmware description)
Restart System

More Information are available on the CPLD Firmware description and on the readme.txt included into the download zip.