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Overview

The Trenz Electronic TEI1000 is a SoM integrating an Altera Stratix 10 SoC or FPGA, DDR4 SDRAM, SPI Flash memory for configuration and operation, an analogue switch for dynamic boot configuration changes and powerful switch-mode power supplies for most on-board voltages. A large number of configurable IOs is provided via high-speed stacking connections in a compact 6 cm x 8 cm form factor.

Refer to https://trenz.org/tei1000-info for current online available documentation.

Key Features


  • SoC or FPGA

    • Altera Device 1) :            SX (SoC) / GX (FPGA)

    • Logic Density 1) :           040

    • Transceiver Count:         H (24)
    • Speedgrade 1) :             1, 2, 3
    • Power Option:               V (SmartVID standard power)
    • SIP Code 1) :                  L / H (Transceiver Speed : Low / High - tile) 
    • Temperature Range 1) : Commercial / Extended / Industrial 1)

    • Package:                        F35 - 1152 pins
  • RAM/Storage

    • 1 GByte DDR4 SDRAM 2)
    • 64 MByte QSPI Flash 2)
  • On Board

    • Analogue switches for dynamic configuration source management (MSEL Settings)
    • MEMS oscillator
    • System Controller
    • LEDs - green:
      • 3x status
      • 3x user
  • Interface 3)

    • Trenz 6 x 8 SoM socket: 3x B2B Connector (Samtec ADM6)
      • 1.2 V to 1.8 V LVDS:    48x SE / 24x DIFF

      • 1.8 V LVDS:               110x SE / 55x DIFF
      • 1.8 V GPIO:                 64x SE / 29x DIFF
      • 3.3 V HV IO:                48x SE
      • 3.3 V SC IOs:                 4x SE
      • HPS IOs (only for SX): 48x SE
      • MGT:
        • 18x GXB
        •   8x GXB CLK
  • Power

    • Supply Voltage 5.0 V to 12.0 V

  • Dimension
    • 60.0 mm x 80.0 mm
  • Notes
    1) Available as assembly variant or upon request.
    2) Other sizes/devices, which are pin/package-compatible, upon request.
    3) IO type allocation differs with device variant (SX/GX) . 
       Refer to AN 921: Device Migration Guidelines for Intel® Stratix® 10 HF35 Package and SoM schematic for more information

Block Diagram


 


TEI1000 block diagram

Main Components



TEI1000 main components
  1. Altera Stratix 10, U14

  2. DDR4 SDRAM, U1, U2

  3. QSPI Flash, U16
  4. Analogue switch, U21
  5. System Controller, U4
  6. Oscillators, U5 - 25 MHz, U15 - 100 MHz, U17 - 100 MHz
  7. MEMS Oscillator, Y1
  8. LED's green System Controller, D2, D3, D4, D7, D8 
  9. LED's green SoC, D1, D5, D6, 
  10. B2B connector ADM6, JM1, JM2, JM3

Initial Delivery State


Storage device name

Designator

Content

Notes

SoCU14Not programmed


QSPI Flash

U16Not programmed


DDR4 SDRAM

U1 / U2Not programmed

System Controller

U4Firmware
Initial delivery state of programmable devices on the module

Signals, Interfaces and Pins

Connectors

Connector Type

Designator

Interface

IO count

Notes

B2B

JM1

LVDS

48x SE / 24x DIFF

1.8 V Bank 3B

B2B

JM1

IO HV

48x SE

3.3 V Bank 3C.

Can be lowered to 1.8 V via resistors R175 and R234.

B2B

JM1

GPIO

18x SE / 9x DIFF

1.8 V Bank 3D

B2B

JM1

LVDS

6x SE / 3x DIFF

1.8 V Bank 3D

B2B

JM1

IO HPS

48x SE

1.8 V Bank HPS only for SX devices

B2B

JM2

MGT

18x GXB

Banks 1C/1D/1E/1F

B2B

JM2

MGT CLK

8x GXB CLK

Banks 1C/1D/1E/1F

B2B

JM2

LVDS

48x SE / 24x DIFF

1.8 V Bank 2L

B2B

JM3

LVDS

48x SE / 24x DIFF

1.14 V ... 1.89 V Bank 2K

B2B

JM3

LVDS

8x SE / 4x DIFF

1.8 V Bank B3A

B2B

JM3

LVDS

40x SE / 20x DIFF

1.8 V Bank B3A

B2B

JM3

GPIO

6x SE

1.8 V Bank 6A

B2B

JM3

IO

4x SE

3.3 V System Controller Bank 2

Board Connectors

Test Points


Test Point

Top

Bottom

Signal

Notes

TP1


x

1V03


TP2


x

DDR_2V5


TP3


x

3V3D_PERM


TP4


x

DDR_1V2


TP5


x

VTT


TP6

x


PG_S10_VCC


TP7

x


-

U12 CLKOUT. No net name.

TP8


x

1V8D


TP9

x


-

U12 ISHARE. No net name.

TP10


x

0V9


TP11


x

S10_VCCIO3C


TP12


x

S10_SDM_CLK1


TP13


x

S10_VCCFUSEWR_SDM


TP14


x

S10_VCCIO_B2K


TP15

x


VCC_CORE


TP16


x

VCC_SDA


TP17


x

VCC_CLK


TP18


x

VCC_CORE


TP19


x

1V8_FLT1


TP20


x

1V8_FLT2


TP21


x

VCCPLLDIG_SDM


TP22

x


1V03


TP23

x


DDR_2V5


TP24

x


3V3D_PERM


TP25

x


DDR_1V2


TP26

x


VTT


TP27

x


VREFA


TP28


x

VREFA


TP29

x


1V8D


TP30

x


VIN


TP31

x


0V9


TP32

x


S10_VCCFUSEWR_SDM


TP33

x


S10_VCCIO3C


Test Points Information

On-board Peripherals


Chip/Interface

Designator

Connected To

Notes

Stratix 10 SoC / FPGA

U14
  • DDR4 SDRAM U1, U2
  • QSPI Flash U16
  • System Controller U4
  • Status LEDs, D3, D7, D8
  • Oscillators U15, U17, Y1
  • B2Bs JM1, JM2, JM3

DDR4 SDRAM

U1 / U2
  • SoC/FPGA U14

QSPI Flash

U16
  • SoC/PGA U14

Analogue Switch

U21
  • SoC/FPGA U14
  • System Controller U4

System Controller

U4
  • SoC/FPGA U14
  • Analogue Switch U21
  • User LEDs, D1, D5, D6
  • B2B JM3

Oscillator

U5
  • System Controller U4
25 MHz
OscillatorU15
  • SoC/FPGA Bank 3D
100 MHz
OscillatorU17
  • SoC/FPGA Bank SDM
100 MHz
OscillatorY1
  • SoC/FPGA Bank 2M
125 MHz for SoC SX and
100 MHz for SoC GX variants.
On board peripherals

Configuration and System Control Signals

Control Signals and Buses

Signal Name

Connector.Pin

Direction1)

Description

B2B_CLK 2), B2B_SDA 2)

JM3.B30 / JM3.B31

Signal dependent

I2C.

S10_NCONFIG 2)

JM3.B32

IN

Restart configuration. Pulled-up to 1V8D.

S10_NSTATUS 2)

JM3.B33

OUT

Synchronise configuration. Pulled-up to 1V8D.

PWR_ON 2)

JM3.A34

IN

Enable SoM. Pulled-down to GND.

PG_3V3D_PERM

JM3.A35

OUT

Power-good indicator for 3.3 V regulator. Pulled-up to 3V3D_PERM.

PG_S10_VCCIO 2)

JM3.A36

- 2)

Firmware dependent usage.

S10_VCCIO_PG 2)

JM3.A37

IN

Enable power supply for SoM.

MAX10_PG 2)

JM3.A38

OUT

SoM powered-up.

S10_VCCIO_REQ 2)

JM3.A39

OUT

Request for bank 2K voltage power supply. Pulled-down to GND.

PCIE_PERSTN

JM3.C26

INOUT

PCIe PERST# signal or GPIO.

PCIE_WAKEN

JM3.C27

INOUT

PCIe WAKE# signal or GPIO.

S10_TD0_P / S10_TD0_N / S10_TD1_P/S10_TD1_N

JM3.D28 / JM3.D29 / JM3.D26 / JM3B.D27

-

Internal temperature sensing diodes.

S10_TDI / S10_TDO / S10_TCK / S10_TMS

JM3.C32 / JM3.C33 / JM3.C34 / JM3.C35

Signal dependent

Stratix 10 SDM JTAG.

S10_UART_RX / S10_UART_TX

JM3.C49 / JM3.C50

Signal dependent

Stratix 10 UART or GPIO.

MAX10_CRC_ERROR 2)

JM3B.C55

OUT

Firmware dependent usage.

MAX10_TDI_CON / MAX10_TDO_CON / 
MAX10_TCK_CON / MAX10_TMS_CON

JM3.C56 / JM3.C57 / JM3.C58 / JM3.C59

Signal dependent

System Controller JTAG.

MAX10_JTAGEN_CON 2)

JM3.C60

IN

System Controller JTAG Selection. Pulled-up to 3V3D_PERM.

1) Direction:

    • IN: Input from the point of view of this board.

    • OUT: Output from the point of view of this board.

    • INOUT: Bidirectional signal.

2) Firmware dependent. Refer to TEI1000 MAX10 Firmware / TEI1000 MAX10 for further information.

Controller signal.

Power and Power-On Sequence

Power Rails

Power Rail Name / Schematic Name

Connector.Pin

Direction1)

Notes

VIN

JM3.D38 / JM3.D39 / JM3.D40 / JM3.D41 /

JM3.D42 / JM3.D43 / JM3.D44 / JM3.D45

IN

Main SoM power supply.

S10_VCCIO_B2K

JM3.A25

IN

SoC/FPGA Bank 2K power supply.

1V8D

JM3.A26 / JM3.C29 / JM3.C30

OUT

SoM module power supply.

S10_VCCIO3C

JM1.A33

OUT

SoM module power supply.

VREF_B3A

JM3.A29

IN

Input reference bank 3A voltage.

VREF_B3B

JM1.A32

IN

Input reference bank 2L and 3B voltage.

VREF_B3C

JM1.B32

IN

Input reference bank 3C voltage.

VREF_B3D

JM1A.B33

IN

Input reference bank 3D voltage.

VREF_B2K

JM3A.A28

IN

Input reference bank 2K voltage.

1) Direction:

    • IN: Input from the point of view of this board.

    • OUT: Output from the point of view of this board.

Module power rails.

Recommended Power up Sequencing


SequenceNet nameRecommended Voltage RangePull-up/downDescriptionNotes
0---Configuration signal setup.See Configuration and System Control Signals.
1VIN5.0 V to 12 V-SoM power supply.
2PWR_ON 2)3.3 VPull Down 3)SoM enable.
3S10_VCCIO_REQ 2)3.3 VPull Down3)SoM asks baseboard to enable bank 2K voltage power supply.
4S10_VCCIO_PG 2)3.3 V-Proceed SoM power sequence after bank 2k bank supply enable.
5MAX10_PG 2)3.3 VPull Down 3)SoM power up sequence done.

1) This note was removed.

2) Firmware dependent. Refer to TEI1000 MAX10 Firmware / TEI1000 MAX10 for further information.

3) Already implemented by this SoM.

Baseboard Design Hints

Board to Board Connectors

The 4 x 5.64 modules use Samtec AcceleRate HD High-Density on bottom side.
  • ADM6-60-01.5-L-4-2 (legacy) or ADM6-60-01.5-L-4-0 (240 pins, 60 per row)
    •  Mates with ADF6-60-03.5-L-4-2 (legacy) or ADF6-60-03.5-L-4-0

The carriers use Samtec AcceleRate HD High-Density on top side.

  • ADF6-60-03.5-L-4-2 (legacy) or ADF6-60-03.5-L-4-0 (240 pins, 60 per row)
    • Mates with ADM6-60-01.5-L-4-0 (legacy) or ADM6-60-01.5-L-4-2
Features
  • Board-to-Board connector 240-pins / 60 contacts per row
  • Pitch:           0.025" (0.635 mm)
  • Data Rate:
    • ADM6-XX-XX.X-X-X-2: 56 Gbps
    • ADM6-XX-XX.X-X-X-0: 64 Gbps
  • Mates with: ADM6/APF6
  • Insulator Material: Black LCP
  • Contact Material:  Copper Alloy
  • Plating:                 Au or Sn over 50 µ" (1.27 µm) N
  • Operating Temperature Range: -55 ºC to +125 ºC
  • Lead-Free solderable: Yes
  • RoHS Compliant:        Yes
Connector Mating height

When using the same type on baseboard, the mating height is 5 mm. Other mating heights are possible by using connectors with a different height:

Order numberREF numberSamtec NumberTypeContribution to stacking heightComment
30095REF-30095ADM6-60-01.5-L-4-2Module connector1.5 mmStandard connector used on modules (legacy)
- -ADM6-60-01.5-L-4-0Module connector1.5 mmAlternative connector
31137REF-31137ADF6-60-03.5-L-4-2Baseboard connector3.5 mmStandard connector used on carrier (legacy)
--ADF6-60-03.5-L-4-0Baseboard connector3.5 mmAlternative connector
Connectors.

The module can be manufactured using other connectors upon request.

Connector Speed Ratings

The AcceleRate HD High-Density connector speed rating depends on the stacking height; please see the following table:

ConnectorStacking heightSpeed rating
ADM6-XX-XX.X-X-X-25 mm56 Gbps
ADM6-XX-XX.X-X-X-05 mm64 Gbps
Speed rating.
Current Rating

Current rating of Samtec AcceleRate HD High-Density B2B connectors is 1.34 A per pin (4 pins powered).

Connector Mechanical Ratings
  • Shock:      100G, 6 ms Sine
  • Vibration:  7.5G random, 2 hours per axis, 3 axes total


Manufacturer Documentation



Technical Specifications


Absolute Maximum Ratings *)

Power Rail Name/ Schematic Name

Description

Min

Max

Unit

VIN

Supply power from carrier.

-0.3

14

V

S10_VCCIO_B2K

Stratix 10 bank 2k power supply.

-0.5

2.19

V

Absolute maximum ratings

*) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

Temperature range

Trenz Electronic classifies modules into temperature range categories by subsumption of its component data (PCB, ICs, connectors, passive components). The temperature ranges are values for ambient air temperature and do not reflect the junction temperature of individual components.

The categories are:

  • Modules with commercial (C) temperature grade are equipped with components that cover at least the ambient temperature range of 0 °C to 70 °C.
  • Modules with extended (E) temperature grade are equipped with components that cover at least the ambient temperature range of 0 °C to 85 °C.
  • Modules with industrial (I) temperature grade are equipped with components that cover at least the ambient temperature range of -40 °C to 85 °C.

These categories do not take into account the entire custom system consisting of:

  • Customer SoC/FPGA design. The allowed main SoC/FPGA  temperature range is specified from the vendor by junction temperature using corresponding classes (C, E, I). See vendor documentation.
  • Cooling solution, active and or passive cooling.
  • Climate or environmental conditions besides ambient temperature range.
  • Module orientation, neighbouring assemblies, neither other heat sources nor the SoC as heat source to other components.

Classification of the module can be looked up here: Article Number Information i.e.: TExxxx-xx-xx'I'xx, the 'I' indicates that all components are at least in Industrial temperature class.

The temperature of individual components should not exceed the specified range due to self-heating or heating by adjacent components. The actual operating temperature range will depend on the customer design, usage, environment and cooling solution. Consult Cooling Solutions for more information.

Voltage rails

The following table aims to be generic for all variants. The voltage ranges are consistent across assembly variants, but exceptions are possible (custom request).

Parameter

Min

Max

Unit

Reference Document

VIN

5.012.0

V


S10_VCCIO_B2K

1.141.89

V

Altera Stratix 10 Device Datasheet

Recommended operating conditions.

Physical Dimensions

  • Module size: 60 mm × 80 mm - Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 5 mm.

  • PCB thickness: 1.66 mm ±10 %.

All dimensions are shown in millimeters.

Physical dimension

Currently Offered Variants 

Trenz shop TEI1000 overview page*

English page

German page

*)  Module article name encoding table: Altera Stratix 10 GX and SX based modules

Trenz Electronic Shop Overview

Revision History

Hardware Revision History

The hardware revision number is located on the PCB next to the module identifier, separated by a dash.


Board hardware revision number.


Date

Revision

Changes

Documentation Link

2024-0602

1. Changed pulldowns to 1K for all power sequencing groups. Corrected notes about enable thresholds of voltage regulators and load switches.
2. Changed value for R191-195 to 0R.
3. Added 100pF MAX10 JTAG TCK to GND. Comp. C88
4. Removed T6A from Net MAX10_nCONFIG.
5. Swapped R184 with R186. Upper side 150R, lower side 100R for voltage divider.
6. Added filtered monitoring of 1.03V power rail by MAX10.
7. Changed LED D1 to colour green. Same like other LEDs.
8. Fixed group length matching issue of ADD/CMD signals between S10 and first DRAM-Chip.
9. Replaced RAM Reference Clock oscillator (Y1) by 125MHz LVDS oscillator for SX variant and 100MHz LVDS GX variant
10. Replaced TDM3883 GXB regulator with TDM3885 type
11. Replaced VCC_CORE voltage regulator by FS1525. Used schematic from TDK User Guide as reference
12. Moved R180 out of connector J3
13. Drew overview diagram in Altium instead of adding SVG-Image at overview sheet.
14. Updated overview sheet
15. Added 100R bleeding resistor R228 (AN 22507) from VCC_CORE rail to GND
16. Connected R175.2 to U20.6/U20.11 instead of net "S10_VCCIO3C". Added 0R jumper R234 (AN 22738) between "3V3D_PERM" and U20.6/U20.11. Set R175 to DNP. Set R234 to populated.
17. Added 0402 499R (AN 27123) pull-down resistors to TEN pins (U1A.TEN, U2A.TEN) (R229, 230).
18. Pin U4A.D2 (ANAIN1), U4.H4 (CLK1P), U4.H5 (CLK1N), U4.N2 (DPCLK0) and U4.L3 (CLKOUTP) connected to GND.
19. Replaced R227 and R224 by 4k99 (AN 22754).
20. Seperated AGND and PGND of U12: U12.(64-69) -> AGND, U12.(31,32,33,34,35,36,37,58,59,60,61,62,36) -> GND. Connected AGND to GND by net-tie V12 (AN 30278) under U12 in layout. Connected to AGND: R226.2 (PS-resistor), R225.2 (ADDR-resistor), R222.2 (FB-LS-resistor).
21. Added 4k99 pull-up (AN 22754) from VCC to ALERT-pin of FS15625 (U12.28)
22. Added test points to CLKOUT- and ISHRE-pin of FS1525 (U12.29, U12.20) (TP7, TP9)
23. Replaced R72 by 1k resistor (AN 22752).
24. Added note about power consumption of 3V3D_PERM-rail.
25. Added note about purpose of R175.
26. Added note about slave address and Fsw of FS1525.
27. Connected unused GXB receiver pins to GND. ( U14.(N32, N31, M30, M29, H30, H29, F30, F29, D30, D29, B30, B29) )
28. Added note about supply voltage range of bank 2K.
29. Added 0R jumper R235 (AN 22738) between VTT and VREFB2MN0. Added 0R jumper R236 (AN 22738) between VTT and VREFB2NN0.
30. Added note about logic levels of PCIE_PERSTN and PCIE_WAKEN, as well as necessarily of level shifters on carrier board for these signals.
31. Added DNP 10k PUs (R232, R233) (AN 22750) to QSPI_R_IO3 and QSPI_R_IO2.
32. Added test point to voltage rails: VCC_CORE (TP18), 1V8_FLT1 (TP19), 1V8_FLT2 (TP20), VCCPLLDIG_SDM (TP21).
33. Added return path vias next to layer jump of diff pair DDR4-IP_CLK
34. Improved entries to pads of U11.
35. Fixed courtyard intersections where possible.
36. Merged GND polygons near U10.
37. Added additional return path vias next to layer jumps of GXB-pairs, where possible.
38. Added anti-pad keeptouts to GXB-related diff-pair layer jump vias.
39. Removed splits in reference planes for impedance controlled signals where possible.

40. Added test points to the voltage rails on the TOP side
41. Changed DCDC (U6) TDM3885XUMA1 (Ioutmax=4A)-> FS1606-0600-AL (Ioutmax=6A).
42. Added I2C connection (signals B2B_CLK & B2B_SDA) DCDC U6 to MAX10 (U4.M10 & U4.N12) , B2B connector (J3.B30 & J3.B31)
43. Moved Net-Tie V11(signal "EN_S10_VCCFUSEWR_SDM") from "EN5" to "EN3"
44. Full update Library

REV02

-01Initial release


Hardware Revision History

Document Change History

Date

Revision

Contributor

Description

  • Updated to TRM template 4.3.8
  • Minor errors corrected

2026-07-31

v.7

Kilian Jahn

  • Small correction

2025-07-11

v.6

Kilian Jahn

  • Product portfolio update

2025-06-30

v.3

Kilian Jahn

  • Updated Firmware links

2025-06-27

v.2

Kilian Jahn

  • Initial release

--

all

Kilian Jahn

  • --

Document change history.

Disclaimer

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Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

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Product Disclaimer

Products (incl. Software and Firmware) are exclusively designed, manufactured, and distributed for industrial applications. They are not intended, authorized, or certified for use in critical safety applications, medical devices, aerospace, nuclear, life-support, traffic-control, military, or other environments where malfunction or failure could result in personal injury, death, or significant property or environmental damage.

Trenz Electronic GmbH (“Manufacturer”) excludes any liability for inappropriate use in such contexts. The Customer bears all responsibility for verifying suitability and compliance with applicable regulations when deploying in any critical-use scenario. The Customer also agrees to indemnify and hold harmless the Manufacturer from any third-party claims or liabilities arising from such use.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.



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