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To program the bitstream in the Flash, the SPI bus should be correctly configured.

See the section Switches: settings for USB Firmware, FPGA bitstream programming, Power Supply and reset.

See Firmware and Bitstreams for the files required.

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B2B Interface

Through B2B interface, the JTAG (all TE USB FX2 modules) and/bus or the SPI interface bus (TE0320 module only) could be used (see the two paragraphes above).

It is also possible to use B2B interface for 

• Slave Paralellel Paralelle (SelectMAP) mode
• Slave Serial mode

This two mode need a microcontroller as intermediate to program/configure the FPGAconfigurations.

Interface Available to FX2 microcontroller

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Master SPI Mode (TE0300 and TE0320

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, Bus Width=1) or Master Serial/SPI (TE0630, Bus Width=1,2 or 4)

FPGA configures itself from an attached industry-standard (third-party) SPI serial Flash PROM. The FPGA supplies the CCLK output clock from its internal oscillator and drives the clock input of the attached SPI Flash PROM. 

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In Slave Serial mode, an external host such as a microprocessor or microcontroller (the USB FX2 microcontroller for the TE USB FX2 module) writes serial configuration data into the FPGA, using a synchronous serial interface.

TE0630

TE0300 module (Spartan-3E): configuration mode available

See also TE0300 DIP Slide Switch S4 (Configuration).

scroll-scroll-title
title TE0630 TE0300 Configuration Mode and FPGA image source available
Spartan-6 3E  (TE0630 TE0300 module) Source of FPGA image (bitstream) . It could be retrieved from M[ 1 2:0] Configuration Mode Bus Width CCLK Direction (FPGA based) TE0630TE0300's SPI Flash memory TE0630TE0300's Jtag connection TE0630TE0300's USB connectionTE0630 's B2B connection WITHOUT HW modification (desoldering/resoldering) of U15M10, Y18 V11 connection with 3.3V and Gnd, it is only possible to use two type of configurations. <0:0:1> Master Serial/ SPI Mode 1,2 or 4 Output <x :x> (1)<1:0:1> JTAG Mode 1 Input (TCK) (21)   WITH HW modification (desoldering/resoldering) of U15M10, Y18 V11 connection with 3.3V and Gnd, it is only also possible to use these two type of configurations. <1:1:0> Slave Parallel (SelectMapSelect MAP) Mode 8 (3) Input (42) <1:1:1> Slave Serial Mode 1 Input (42)

LEGEND:

• this symbol means that the FPGA image (bitstream) could be retrieved from  the source corrispondent to the column, using the Configuration Mode corrispondent to the row
• this symbol means that the FPGA image (bitstream) could NOT be retrieved from the source corrispondent to the column, using the Configuration Mode corrispondent to the row

(1)

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Do not confuse this connection with the Jtag-USB cable used with TE0300's Jtag connection.

(2

(2) Do not confuse this connection with the Jtag-USB cable used with TE0630's Jtag connection.

(3) 16 bit inteface is theoretically possble but is not supported in the TE0630 module.

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) TDI,TDO,TCK and TMS are not connected to USB FX2 microcontroller.

Another configuration is Other 3 configurations are theoretically possible, but this these configuration requires modes require a component not mounted on the TE0630 TE0300 module.

TE0320 (Spartan-3A): configuration mode available

See also TE0320 Mode Select Pins M[2:0].

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TE0300

TE0630 (Spartan-6): configuration mode available

All mode selection pins are hardwired (they do not exist as switchesSee TE0300 DIP Slide Switch S4 (Configuration).

Scroll Title
title TE0300 TE0630 Configuration Mode and FPGA image source available
Spartan-3E  6 (TE0300 TE0630 module) Source of FPGA image (bitstream). It could be retrieved from M[21:0] Configuration Mode Bus Width CCLK Direction (FPGA based) TE0300TE0630's SPI Flash memory TE0300TE0630's Jtag connection TE0300TE0630's USB connection TE0630's B2B connection WITHOUT HW modification (desoldering/resoldering) of M10U15, V11 Y18 connection with 3.3V and Gnd, it is only possible to use two type of configurations. <0:0:1> Master Serial/SPI Mode 1,2 or 4 Output <1 :0:1><x:x> (1) JTAG Mode 1 Input (TCK) (12)   WITH HW modification (desoldering/resoldering) of M10U15, V11 Y18 connection with 3.3V and Gnd, it is also only possible to use these two type of configurations. <1:1:0> Slave Parallel (Select MAPSelectMap) Mode 8 (3) Input (24) <1:1:1> Slave Serial Mode 1 Input (24)

LEGEND:

• this symbol means that the FPGA image (bitstream) could be retrieved from  the source corrispondent to the column, using the Configuration Mode corrispondent to the row
• this symbol means that the FPGA image (bitstream) could NOT be retrieved from the source corrispondent to the column, using the Configuration Mode corrispondent to the row

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• from the source corrispondent to the column, using the Configuration Mode corrispondent to the row

(1) Spartan-6 devices also have a dedicated four-wire JTAG (IEEE Std 1149.1) port that is always available to the FPGA regardless of the mode pin settings.

(2) Do not confuse this connection with the Jtag-USB cable used with

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TE0630's Jtag connection.

(

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3) 16 bit inteface is theoretically possble but is not supported in the TE0630 module.

(4) TDI,TDO,TCK and TMS are not connected to USB FX2 microcontroller.

Other 3 configurations are Another configuration is theoretically possible, but these this configuration modes require requires a component not mounted on the TE0300 TE0630 module.

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