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Template Revision 28

  • Module: TRM Name always "TE Series Name" +TRM
    Example: "TE0728 TRM"
  • Carrier: TRM Name usually "TEB Series Name" +TRM
    Example: "TEB0728 TRM"


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Important General Note:

  • If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable
  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Scroll Title
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        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, objects are only linked.


        Scroll Only

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      • Table template:

        • Layout macro can be use for landscape of large tables

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        ExampleComment
        12



    • The anchors of the Scroll Title should be named consistant across TRMs. A incomplete list of examples is given below

      • <type>_<main section>_<name>

        • type: Figure, Table
        • main section:
          • "OV" for Overview
          • "SIP" for Signal Interfaces and Pins,
          • "OBP" for On board Peripherals,
          • "PWR" for Power and Power-On Sequence,
          • "B2B" for Board to Board Connector,
          • "TS" for Technical Specification
          • "VCP" for Variants Currently in Production
          •  "RH" for Revision History
        • name: custom, some fix names, see below
      • Fix names:
        • "Figure_OV_BD" for Block Diagram

        • "Figure_OV_MC" for Main Components

        • "Table_OV_IDS" for Initial Delivery State

        • "Table_PWR_PC" for Power Consumption

        • "Figure_PWR_PD" for Power Distribution
        • "Figure_PWR_PS" for Power Sequence
        • "Figure_PWR_PM" for Power Monitoring
        • "Table_PWR_PR" for Power Rails
        • "Table_PWR_BV" for Bank Voltages
        • "Table_TS_AMR" for Absolute_Maximum_Ratings

        • "Table_TS_ROC" for Recommended_Operating_Conditions

        • "Figure_TS_PD" for Physical_Dimensions
        • "Table_VCP_SO" for TE_Shop_Overview
        • "Table_RH_HRH" for Hardware_Revision_History

        • "Figure_RH_HRN" for Hardware_Revision_Number
        • "Table_RH_DCH" for Document_Change_History
    • Use Anchor in the document: add link macro and add "#<anchorname>
    • Refer to Anchror from external : <page url>#<pagename without space characters>-<anchorname>



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Note for Download Link of the Scroll ignore macro:


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Download PDF version of this document.


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Table of Contents

Table of Contents

Overview

The Trenz Electronic TE0706 Carrier Board provides functionalities for testing, evaluation and development purposes of company's 4 x 5 cm SoMs. The Carrier Board is equipped with various components and connectors for different configuration setups and needs. The interfaces of the SoM's functional units and PL I/O-banks are connected via board-to-board connectors to the Carrier Board's components and connectors for easy user access.

See "4 x 5 SoM Carriers" page for more information about supported 4 x 5 cm SoMs.

Refer to http://trenz.org/te0706-info for the current online version of this manual and other available documentation.

Key Features

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Note:
Use 'Key Features' description in shoping page, for example: https://shop.trenz-electronic.de/de/TE0728-04-1Q-SoC-Modul-mit-AMD-Automotive-Zynq-7020-512-MByte-DDR3L-6-x-6-cm

  • 3 x Samtec LSHM Series Board to Board Connectors
  • VG96 connector (mounting holes and solder pads, J6) and 50-pin IDC male connector socket (J5) for access to PL I/O-bank pins
  • USB2.0 type A connector, or optionally Micro USB 2.0 connector
  • 1 x RJ45 GbE MagJack (J3), connected via MDI to B2B connector JB1
  • 1 x Marvell Alaska 88E1512 GbE PHY, providing Ethernet interface in conjunction with RJ45 GbE MagJack (J2)
  • 4 A High-Efficiency Power SoC DC-DC Step-Down Converter (Enpirion EN6347) for 3.3V power supply
  • XMOD JTAG- / UART-header JX1
  • Micro SD card socket
  • SDIO port expander with voltage-level translation and jumper (J13) for selection of SDIO voltage on SoM side
  • DIP-switches S1 to set SoM's control signals
  • 1 x user-push button (S2), by default configured as system reset button
  • 3 x VCCIO selection jumper J10, J11 and J12 to set SoM's PL I/O-bank voltages
  • 5V power supply barrel jack

Additional assembly options are available for cost or performance optimization upon request.

Block Diagram

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Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .



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Main Components

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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .



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  1. 5V power connector jack, J1
  2. Reset switch, S2
  3. USB2.0 type A receptacle, J7
  4. Micro SD card socket with Card Detect, J4
  5. 50 pin IDC male connector, J5
  6. 1000Base-T Gigabit RJ45 Ethernet MagJack, J3
  7. 1000Base-T Gigabit RJ45 Ethernet MagJack, J2
  8. XMOD JTAG- / UART-header, JX1
  9. User DIP-switch, S1
  10. VCCIO selection jumper block, J10 - J12
  11. External connector (VG96) placeholder, J6
  12. Samtec Razor Beam™ LSHM-150 B2B connector, JB1
  13. Samtec Razor Beam™ LSHM-150 B2B connector, JB2
  14. Samtec Razor Beam™ LSHM-130 B2B connector, JB3
  15. SoM SDIO voltage selection jumper, J13

Initial Delivery State

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Notes :

Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

There is no hardware component to be programmed on the carrier.

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Storage device name

Content

Notes

---------


Board is shipped in following configuration:

  • VCCIO voltage selection jumpers are all set to 1.8 V.
  • S2 switch configured as reset button.

Different delivery configurations are available upon request.

Configuration Signals

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  • Overview of Boot Mode, Reset, Enables.


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Signal

DesignatorB2BStateDescriptionNote

MODE

S1-3JB1-31ONDrive SoM SC CPLD pin 'MODE' low.Usually SD-Boot
OFFLeave SoM SC CPLD pin 'MODE' open.Usually  QSPI-Boot
EN1S1-4JB1-27ONDrive SoM SC CPLD pin 'EN1' low.

Usually used to enable/disable FPGA core-voltage supply. (Depends also on SoM's SC CPLD firmware).

Note: Power-on sequence will be intermitted if S1-4 is set to OFF and if functionality is supported by SoM.

OFFDrive SoM SC CPLD pin 'EN1' high.


There is a user push button which is used for RESET signal.

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Signal

DesignatorB2BNote

RESIN

S2JB2-17Aktive Low


Signals, Interfaces and Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Board to Board (B2B) I/Os

With the TE0706 Carrier Board's Board-to-Board Connectors (B2B) the MIO- and PL I/O-bank's pins and further interfaces of the mounted SoM can be accessed. A large quantity of these I/Os are also usable as LVDS-pairs. The connectors provide also VCCIO voltages to operate the I/Os properly.

Following table gives a summary of the available I/Os, interfaces and LVDS-pairs of the B2B connectors JB1, JB2 and JB3:

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B2B ConnectorInterfaces

Count of I/Os

Notes
JB1User I/O48 single ended or 24 differential-
8 single endedMIO with Zynq Modules
GbE MagJack J3 MDI8-
SD IO6-
SoM control signals5EN1, PGOOD, MODE, NOSEQ, PRPGMODE
JB3GbE PHY U6 RGMII18-
USB2.0 (OTG, device and host mode)5-
JB2User I/O18 single ended-
48 single ended or 24 differential-
JTAG4-
SoM control signals1RESIN
GbE MagJack J3 LEDs2-


On-board Connector

The TE0706 Carrier Board has a 50-pin IDC male connector J5 and soldering pads as place-holder to mount a VG96 connectors J6 to get access the PL I/O-bank's pins and further interfaces of the mounted SoM. With these connectors, SoM's PL-I/Os are available to the user, a large quantity of these I/Os are also usable as  differential pairs.

Following table gives a summary of the pin-assignment, available interfaces and functional I/Os of the connectors J5 and J6:

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On-board ConnectorControl Signals and InterfacesCount of I/OsNotes
J5User I/O18 single ended-
14 single ended or 7 differential-
MIO8-
GbE MagJack J2 LEDs2-
J6

User I/O

82 single ended or 41 differential-
SoM control signals2'PGOOD', 'NOSEQ'


JTAG/UART Interface Base

JTAG/UART access to the TE0706 carrier is available through XMOD header JX1, which has a 'XMOD FTDI JTAG Adapter'-compatible pin-assignment. This header provides also a UART interface, usually established by MIO-pins of the PS-bank of the mounted SoM's Zynq device. XMOD USB2.0 to JTAG/UART adapter TE0790 is provided by Trenz Electronic. More information is available here. Devices of the mounted SoM can be programed via USB2.0 interface.

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XMOD DesignatorDesignatorB2B PinXMOD Header JX1Note
3.3V--JX1-5NC
AMIO15JB1-86JX1-3UART Txd - (transmit line)
BMIO14JB1-91JX1-7UART Rxd - (receive line)
CTCK_BJB2-100JX1-4JTAG-TCK
DTDO_BJB2-98JX1-8JTAG-TDO
EXMOD_E--NC
FTDI_BJB2-96JX1-10JTAG-TDI
GXMOD_G--NC
HTMS_BJB2-94JX1-12

JTAG-TMS

VIOVCCJTAGJB2-92JX1-6VIO is connected to 3.3V which is supplied by carrier


When using XMOD FTDI JTAG Adapter TE0790, the adapter-board's VIO will be sourced by the mounted SoM's 'VCCJTAG' (pin JB2-92). Set the DIP-switch with the setting:

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XMOD DIP-switchesPosition
Switch 1ON
Switch 2OFF
Switch 3OFF
Switch 4ON



Note

Use AMD compatible TE0790 adapter board (designation TE-0790-xx with out 'L') to program the AMD Zynq devices.

The TE0790 adapter board's CPLD have to be configured with the Standard variant of the firmware. Refer to the TE0790 Resources Site for further information and firmware download.

SD Card Socket

The SD Socket is routed to the on-board Texas Instruments TXS02612 SDIO port expander U4. This IC provides a necessary VDD/VCCIO translation between the MicroSD Card socket J4 (3.3V) and the SoM's Zynq device MIO-bank (1.8V/3.3V depending on Module, compare jumper J13 ):

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SD IO Signal Schematic NameConnected toNote
eSD_DAT0U4-18SD IO data
eSD_DAT1U4-16SD IO data
eSD_DAT2U4-23SD IO data
eSD_DAT3U4-22SD IO data
eSD_CLKU4-19SD IO clock
eSD_CMDU4-20SD IO command
MIO0J5-29Card Detect signal


USB2.0 connector

TE0706-03 board has one physical USB2.0 type A socket J7, the differential data signals of the USB2.0 socket are routed to the B2B connector JB3, where they can be accessed by the corresponding USB2.0 PHY transceiver of the mounted SoM.

There is also the option to equip the board with a Micro USB 2.0 type B (receptacle) socket (J8) to the board as alternative fitting option. With this fitting option (Micro USB2.0 type B), the USB2.0 interface can also be used for Device mode, OTG and Host Modes.

For USB2.0 Host mode, the Carrier Board is additionally equipped with a power distribution switch U5 to provide the USB2.0 interface with the USB supply voltage USB-VBUS with nominal value of 5V. OTG mode is not available with USB2.0 Type A socket.

Following table gives an overview of the USB2.0 connector signals:

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USB2.0 Signal Schematic NameB2BConnected to (type A) Connected to (optional replacement for type A J7)Note
OTG-D_N

JB2-48

J7-2J8-2USB2.0 data
OTG-D_PJB2-50J7-3J8-3USB2.0 data
OTG-IDJB2-52NCJ8-4Ground this pin for A-Device (host),  left floating this pin for B-Device (peripheral).
VBUS_V_ENJB2-54U5-4U5-4Enable USB-VBUS.
USB-VBUSJB2-56J7-1J8-1USB supply voltage in Host mode.


RJ45 Gigabit Ethernet Connectors

The TE0706 Carrier Board is equipped with two Gigabit Ethernet ports. One of them (J2) is routed to Marvell Alaska 88E1512 Gigabit Ethernet PHY (U6). The GbE MegJack J2 has two integrated LEDs (both green), its signals are routed as MDI (Media Dependent Interface) to the GbE PHY. The MegJack J3 is connected via MDI directly to the B2B connector JB1. There is usually a corresponding Gigabit Ethernet PHY on 4 x 5 SoMs (e.g. TE0715 or TE0720), which can be used in conjunction with the baseboard MagJack J3.


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MegJack J2SignalConnected to
J2-2PHY2_MDI0_PU6-28
J2-3PHY2_MDI0_NU6-27
J2-4PHY2_MDI1_PU6-24
J2-5PHY2_MDI1_NU6-23
J2-6PHY2_MDI2_PU6-22
J2-7PHY2_MDI2_NU6-21
J2-8PHY2_MDI3_PU6-18
J2-9PHY2_MDI3_NU6-17
J2 Green MegJack LEDPHY_LED0U6-14
J2 Green MegJack LEDPHY_LED1U6-13



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MegJack J3SignalB2B
J3-2PHY_MDI0_P

JB1-3

J3-3PHY_MDI0_NJB1-5
J3-4PHY_MDI1_PJB1-9
J3-5PHY_MDI1_NJB1-11
J3-6PHY_MDI2_PJB1-15
J3-7PHY_MDI2_NJB1-17
J3-8PHY_MDI3_PJB1-21
J3-9PHY_MDI3_NJB1-23
J3 Green MegJack LEDETH_LED1

JB2-90

J3 Yellow MegJack LEDETH_LED2JB2-99



MIO Pins

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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO PinConnected toB2BNotes
MIO12..14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI










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Signal (MIO Pin)Connected toB2BNotes
MIO0

micro SD-Card, J5-29

JB1-88Card detect
MIO9J5-30JB1-92
MIO10J5-28JB1-96I²C clock line
MIO11J5-27JB1-94I²C data line
MIO12J5-26JB1-100
MIO13J5-25JB1-98
MIO14XMOD, J5-32JB1-91UART
MIO15XMOD, J5-31JB1-86
6 x MIOSD-CardJB1B2B positions see SDIO Port Expander. MIO positions depend on attached SoM.


On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


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Chip/InterfaceDesignatorNotes

4-bit DIP-switch

S1Bit 1 not connected

VCC Selection Jumper

J10-J13VCCIOA, VCCIOB, VCCIOC, SD_VCCA

RTC Buffer Voltage Supply Header

J9

Push Button

S2

Gigabit Ethernet PHY

U6

SDIO Port Expander

U4


4-bit DIP-switch

Table below describes DIP-switch S1 settings for configuration of the mounted SoM:

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SwitchSignal NameONOFFNotes
S1-1---Not connected.
S1-2PROGMODEJTAG enabled for programing mounted SoM's Zynq-SoC.JTAG enabled for programing mounted SoM's SC-CPLD.-
S1-3MODEDrive SoM SC CPLD pin 'MODE' low. (SD-Boot)Leave SoM SC CPLD pin 'MODE' open. (QSPI-Boot)

Boot mode configuration, if supported by SoM. (Depends also on SoM's SC-CPLD firmware).

S1-4EN1Drive SoM SC CPLD pin 'EN1' low.Drive SoM SC CPLD pin 'EN1' high.

Usually used to enable/disable FPGA core-voltage supply. (Depends also on SoM's SC CPLD firmware).

Note: Power-on sequence will be intermitted if S1-4 is set to OFF and if functionality is supported by SoM.



Note

Note: Compared to the former revision 02 of this board, the DIP-switch is rotated by 180° due to routing issues.


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VCC Selection Jumpers

Note

Note: The corresponding PL I/O-bank supply-voltages of the 4 x 5 SoM to the selectable base-board voltages VCCIOA, VCCIOB and VCCIOC are depending on the mounted 4 x 5 SoM and varying in order of the used model.

Refer to the SoM's schematic for information about the specific pin assignments on module's B2B-connectors regarding the PL I/O-bank supply-voltages and to the 4 x 5 Module integration Guide for VCCIO voltage options.

The Carrier Board VCCIO for the PL I/O-banks of the mounted SoM are selectable by the jumpers J10, J11 and J12.

Following table describes how to configure the VCCIO of the SoM's PL I/O-banks with jumpers:

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Supply Voltage by JumperSupply Voltage by 0-Ohm ResistorSupply Connector PinSupplied Connector Pin
Voltage Level1.8V3.3V1.8V3.3V

VCCIOAJ10: 1-2, 3J10: 1, 2-3-R20J6-B32 JB1-10, JB1-12
VCCIOBJ11: 1-2, 3J11: 1, 2-3R29R21-JB2-6
VCCIOCJ12: 1-2, 3J12: 1, 2-3R30R22J6-B1 JB2-8, JB2-10


Only one supply-source is allowed to configure the base-board supply-voltages, either by jumper, by 0-Ohm-resistor or by connector J6. If a supply-voltage is configured by 0-Ohm-resistor or connector J6, then the corresponding configuration-jumper has to be removed. There aren't 0-Ohm-resistors and supply-voltages by connector J6 allowed if the corresponding base-board supply-voltage is configured by jumper. Vice versa jumpers and 0-Ohm-resistors have to be removed if supplying corresponding base-board supply-voltage by connector J6.

Note: If supplying base-board supply-voltages by connector J6, the module's internal 3.3V voltage-level on pins 9 and 11 of B2B-connector JB2 has to be reached stable state.

Note

Take care of the VCCO voltage ranges of the  particular PL IO-banks (HR, HP) of the mounted SoM, otherwise damages may occur to the FPGA. Therefore, refer to the TRM of the mounted SoM to get the specific information of the voltage ranges.

It is recommended to set and measure the PL IO-bank supply-voltages before mounting of TE 4 x 5 module to avoid failures and damages to the functionality of the mounted SoM.

The SDIO voltage on the SoM side can be selected by jumper J13.

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Supply Voltage by JumperSupplied Connector Pin
Voltage Level1.8V3.3V
SD_VCCAJ13: 1-2, 3J13: 1, 2-3U4-5



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RTC Buffer Voltage Supply Header

The buffer voltage of the SoM's RTC can be supplied through the header J9 (VBAT-pin). Refer to the SoM's TRM for recommended voltage range and absolute maximum ratings.

Push Button

The Carrier Board's push button S2 is connected to the 'RESIN' signal, the function of the button is to trigger a reset of the mounted SoM by driving the reset-signal 'RESIN' to ground.

Gigabit Ethernet PHY

The TE0706 Carrier Board is equipped with a Marvell Alaska 88E1512 Gigabit Ethernet PHY (U6), which provides in conjunction with the Gigabit Ethernet MagJack J2 a 1000Base-T Ethernet (GbE) interface. The Ethernet PHY RGMII interface is connected to the B2B connector JB3, where they can be accessed by the mounted SoM's PS bank. The I/O Voltage is fixed at 1.8V. Reference clock input of the PHY is supplied from the on-board 25.000000 MHz oscillator (U7), the 125MHz output clock signal *CLK125' is connected to the B2B connector pin JB3-32.

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PHY U6 pinsB2B-pinNotes
ETH-MDC/ETH-MDIOJB3-49, JB3-51-
PHY_LED0-Connected to GbE MagJack J2 LED0 (green). Also connected to J5-24 (PHY_LED0_CON).
PHY_LED1-Connected to GbE MagJack J2 LED1 (green). Also connected to J5-23 (PHY_LED1_CON).
PHY_INTJB3-33-
CONFIGJB3-60-
CLK125JB3-32PHY Clock (125 MHz) output.
ETH-RSTJB3-53-
RGMIIJB3-31
JB3-37 - JB-44
JB3-47
JB3-57 - JB-59

Reduced Gigabit Media Independent Interface. 12 pins.

Note

ETH-RXCK is connected via 0Ohm to JB3-31 (R18)and JB3-58 (R19). Usage depends on Module and AMD IP restrictions
In case of performance  problems remove 0Ohm resistor from the unused Pin.


SGMII-

Serial Gigabit Media Independent Interface.

Not connected.

MDI-

Media Dependent Interface.

Connected to Gigabit Ethernet MagJack J2.


SDIO Port Expander

The TE0706 Carrier Board is equipped with a Texas Instruments TXS02612 SDIO Port Expander, which is needed for voltage translation due to different voltage levels of the Micro SD Card and the PS MIO-bank of the Zynq device of the mounted SoM. The Micro SD Card has 3.3V signal voltage level, but the PS MIO-bank on the AMD Zynq module has VCCIO of 1.8V or 3.3V depending on the attached module. This has to be selected by J13.

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SD-Card Signal Schematic NameSD-Card Connected to Connected toSD IO Signal Schematic NameB2BNote
eSD_DAT0U4-18U4-6SD_DAT0JB1-24SD IO data
eSD_DAT1U4-16U4-7SD_DAT1JB1-22SD IO data
eSD_DAT2U4-23U4-1SD_DAT2JB1-20SD IO data
eSD_DAT3U4-22U4-3SD_DAT3JB1-18SD IO data
eSD_CLKU4-19U4-9SD_CLKJB1-28SD IO clock
eSD_CMDU4-20U4-4SD_CMDJB1-26SD IO command
MIO0---JB1-88Card Detect signal


Power and Power-On Sequence

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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

Power supply with minimum current capability of 3A for system startup is recommended.

Power Consumption

The maximum power consumption of the Carrier Board depends mainly on the mounted SoM's FPGA design running on the Zynq device.

AMD provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

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Power Input PinTypical Current
VINTBD*
VBATTBD*


 * TBD - To Be Determined.

Power supply with minimum current capability of 3A for system startup is recommended.

Warning
To avoid any damage to the module, check for stabilized on-board voltages and VCCIOs before put voltages on PL I/O-banks and interfaces. All I/Os should be tri-stated during power-on sequence.

Power Distribution Dependencies

The Carrier Board needs one single power supply voltage with a nominal value of 5V. Following diagram shows the distribution of the input voltage '5VIN' to the on-board components on the mounted SoM:

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Power Rails

The voltage direction of the power rails is directed at on-board connectors' view:


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Module Connector (B2B) DesignatorVCC / VCCIODirectionPinsNotes
JB1

3.3V

Out

2, 4, 6, 14, 16

3.3V module supply voltage
VCCIOAOut10, 12PL IO-bank VCCIO
M1.8VOUTIn401.8V module output voltage
VBATOut80RTC buffer voltage
JB2

1.8V

Out

2, 4

1.8V module supply voltage
VCCIOBOut6PL IO-bank VCCIO
VCCIOCOut8, 10PL IO-bank VCCIO
M3.3VOUTIn9, 113.3V module output voltage
VCCJTAGIn923.3V JTAG VCCIO
JB3USB-VBUSOut56USB Host supply voltage



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On-board Connector DesignatorVCC / VCCIODirectionPinsNotes
J5

3.3V

Out

6, 45

3.3V module supply voltage
M3.3VOUTOut5, 463.3V module output voltage
J6

VCCIOA

Out / In

B32

PL IO-bank VCCIO, depends on Jumper settings
VCCIOCOut / InB1PL IO-bank VCCIO, depends on Jumper settings
M3.3VOUTOutC323.3V module output voltage
3.3VOutC313.3V module supply voltage
5VINOutA1, A2Carrier Board supply power



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Jumper / Header DesignatorVCC / VCCIODirectionPinsNotes
J10VCCIOAIn2-
1.8VOut1-
M3.3VOUTOut3-
J11

VCCIOB

In2-
1.8VOut1-
M3.3VOUTOut3-
J12VCCIOCIn2-
1.8VOut1-
M3.3VOUTOut3-



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Main Power Jack and Pins DesignatorVCC / VCCIODirectionPinsNotes
J15VINIn

1

Power Jack 2.1mm 90° SMD
J9VBATIn1Attention: Pin 2 connected to ground. VBAT voltage connected on this pin cause short-circuit.



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Peripheral Socket DesignatorVCC / VCCIODirectionPinsNotes
J7 / J8USB-VBUSIn / Out1Direction depends on USB mode
J4M3.3VOUTOut4MikroSD Card socket VDD



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titlePower pin description of XMOD/JTAG Connector.

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XMOD Header DesignatorVCC / VCCIODirectionPinsNotes
JX13.3V-5not connected
VIOOut6connected to 'VCCJTAG' (pin JB2-92)


Board to Board Connectors

Include Page
4 x 5 SoM LSHM B2B Connectors
4 x 5 SoM LSHM B2B Connectors

Technical Specifications

Absolute Maximum Ratings

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Parameter

MinMax

Units

Reference Document

5VIN supply voltage

 -0.3 7

V

MP5010A, EN6347QI, EN5311QI data sheet

Storage temperature

 -55

+85

°C

Marvell 88E1512 data sheet


Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

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ParameterMinMaxUnitsReference Document
5VIN supply voltage 4.755.25 VUSB2.0 specification concerning 'VBUS' voltage
Operating temperature -40+85°C-


The TE0706 Carrier Board itself is capable to be operated at industrial grade temperature range (-40 °C ..+85 °C).

Please check the operating temperature range of the mounted SoM, which determine the relevant operating temperature range of the overall system.

Physical Dimensions

  • Board size:  PCB 100mm ×  64.5mm. Notice that the USB type A socket on the left and the Ethernet RJ-45 jacks on the right are hanging slightly over the edge of the PCB making the total width of the longer side approximately 106mm. Please download the assembly diagram for exact numbers.

  • Mating height of the module with standard connectors: 8mm

  • PCB thickness: 1.65mm

  • Highest parts on the PCB are USB type A socket and the Ethernet RJ-45 jacks, approximately 15mm. Please download the step model for exact numbers.

Page properties
hiddentrue
idComments

In 'Physical Dimension' section, top and button view of module must be insterted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part)for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


 All dimensions are given in millimeters.

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Currently Offered Variants 

Page properties
hiddentrue
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Set correct link to the shop page overview table of the product on English and German.

Example for TE0728:

ENG Page: https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/TE07XX-Zynq-SoC/TE0728-Zynq-SoC/

DEU Page: https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/TE07XX-Zynq-SoC/TE0728-Zynq-SoC/

if not available, set.


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Trenz shop TE0728 overview page
English pageGerman page



Revision History

Hardware Revision History

List of online PCNs can be found here.

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DateRevision

Notes

Documentation Link
2016-06-28

01

  • Prototypes
TE0706-01
-02
  • First Production Release
  • Refer to Changes list in Schematic

    for further details in changes to REV01

TE0706-02
2019-04-1103
  • all components are industrial temperature range
  • added SDIO Levelshifter
TE0706-03



Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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titleBoard hardware revision number.


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Document Change History

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Date

Revision

Contributors

Description

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  • Changed Xilinx to AMD.
  • Updated to PCN-20231106.

2021-02-19

v.76

John Hartfiel

  • Note to PHY connection
2010-07-16v.74John Hartfiel
  • update Physical Dimensions
2019-05-27v.73Martin Rohrmüller
  • Updated to REV03
  • Updated to TRM v28
2018-06-03v.66John Hartfiel
  • Add note to DIP settings
2017-11-10

v.64

John Hartfiel
  • Replace B2B connector section
2017-11-09v.60Ali Naseri
  • TRM revision to new common style

2017-07-06

v.52

...

Download PDF version of this document.

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Table of Contents

Table of Contents

Overview

Scroll Only (inline)
Refer to https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/carrier_boards/TE0706 for downloadable version of this manual and additional technical documentation of the product.

 

The Trenz Electronic TE0706 Carrier Board is a base-board for 4 x 5 SoMs, which exposes the module's B2B-connector-pins to accessible connectors and provides a whole range of on-board components to test and evaluate TE 4 x 5 SoMs.

See page "4 x 5 cm carriers" for information about the SoMs supported by the TE0706.

Block Diagram

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Main Components

Image Removed

  1. 5V power connector jack, J1
  2. Reset switch, S2
  3. USB type A receptacle, J7
  4. Micro SD card socket with detect switch, J4
  5. 50 pin IDC male connector, J5
  6. 1000Base-T Gigabit RJ45 Ethernet MagJack, J3
  7. 1000Base-T Gigabit RJ45 Ethernet MagJack, J2
  8. JTAG Connector, JX1
  9. User DIP switch block, S1
  10. VCCIO voltage selection jumper block, J10 - J12
  11. External connector (VG96) placeholder, J6
  12. Samtec Razor Beam™ LSHM-150 B2B connector, JB1
  13. Samtec Razor Beam™ LSHM-150 B2B connector, JB2
  14. Samtec Razor Beam™ LSHM-130 B2B connector, JB3

Key Features

  • VG96 backplane connector (mounting holes and solder pads, J6) and 50-pin IDC male connector socket (J5) to access FPGA bank's I/O-pins
  • SDIO port expander with voltage-level translation
  • Micro SD card socket, routed to B2B-connector JB1
  • USB type A connector (OTG mode), routed to B2B-connecor JB3
  • 1 x user-push button S2, routed to RESIN-pin on B2B-connector JB2. By default it is configured as system reset button.
  • 1 x RJ45 Gigabit Ethernet MagJack J3, PHY_MDI interface routed to B2B-connector JB1.
  • 1 x Marvell Alaska 88E1512 Ethernet PHY, routed to B2B-connector JB3 and accessible via RJ45 Gigabit Ethernet MagJack J2
  • Barrel jack for 5 V Power Supply input
  • 4 A High-Efficiency Power SoC DC-DC Step-Down Converter (Enpirion EN6347) for 3.3 V Power Supply
  • Trenz 4 x 5 Module Socket (3 x Samtec LSHM series connectors)
  • JTAG pins on 12-pin header JX1, routed to B2B-connector JB2
  • user configurable DIP switch S1 to set System Controller CPLD signals on SoM
  • 3 x  VCCIO selection jumper J10, J11 and J12 to set SoM s bank voltages

Initial Delivery State

Board is shipped in following configuration:

  • VCCIO voltage selection jumpers are all set to 1.8 V.
  • S2 switch configured as reset button.
  • One VG96 backplane connector is not soldered to the board, but is included in the package as separate component.

Different delivery configurations are available upon request.

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

For detailed information about the B2B pin out, please refer to the Master Pin-out Table. 

JTAG Interface

JTAG access to the SoMs Xilinx Zynq chip on the SoM is provided via 12-pin header JX1 and controlled by DIP switch S1-2. JTAG pins are routed to the JB2 and JX1 connectors as follows:

...

JTAG Signal

...

B2B Connector

...

Micro SD Card Socket

Micro SD Card socket is not directly wired to the B2B connector pins, but through a Texas Instruments TXS02612 SDIO port expander, which is needed for voltage translation due to the different voltage levels of the Micro SD Card and MIO bank 501 of the Xilinx Zynq 7000 chip. The Micro SD Card has 3.3 V signal voltage-level, but the MIO Bank 501 on the Xilinx Zynq 7000 chip is set to 1.8 V.

Ethernet

The TE0706-02 is equipped with a Marvell Alaska 88E1512 Gigabit Ethernet PHY (U6) connected to the B2B connector JB3. The I/O Voltage is fixed at 1.8V. The reference clock input of the PHY is supplied by on-board 25MHz oscillator (U7).

PHY (U6) interface connections: 

...

JB3-47,

...

RJ45 Gigabit Ethernet MagJack J3

The TE0706-02 carrier board is also equipped with a second Gigabit-Ethernet MagJack J3, which is connected via MDI to the B2B connector JB1.

There is usually a corresponding Gigabit Ethernet PHY on 4 x 5 SoMs (e.g. TE0715 or TE0720), which can be used in conjunction with the baseboard MagJack J3.

USB Interface

TE0706-02 board has one physical USB type A socket J7 routed to B2B connector JB3. The corresponding USB-transceiver on 4 x 5 SoMs varies in order of the used SoM model. 

There is also the option to equip a micro USB 2.0 type B receptacle socket (J8) to the board as alternative.

Info
Note: Pin OTG-ID is only assigned to USB 2.0 type B socket.

DIP switch S1

...

Boot mode configuration, if supported by SoM. (Depends also on SoM's SC CPLD firmware).

...

Usually used to enable/disable FPGA core-voltage supply. (Depends also on SoM's SC CPLD firmware).

Note: Power-on sequence will be intermitted when S1-4 is set to OFF and functionality is supported by SoM.

Power and Power-On Sequence

Power supply with minimum current capability of 3A for system startup is recommended.

Power Supply

TE0706-02 needs one single power supply with nominal of 5V.

Power Consumption

...

The power-consumption of TE0706-02 in conjunction with different 4 x 5 SoMs under certain configurations are depending on the used model of the 4 x 5 SoM and the custom-made FPGA-design on this SoM. Please refer to the TRM of the mounted 4 x 5 SoM to get information about the typical power consumption.

Power-On Sequence

It is not allowed to feed any voltage to any external I/O pin before there is no power indication on M3.3VOUT pins. Presence of 3.3V on B2B JB2 connector pins 9 and 11 indicates that module is properly powered up and ready. The 1.8V voltage-level on base-board for supplying  PL I/O bank supply-voltages will be powered up after the module's 3.3V voltage-level has reached stable state and M3.3VOUT is available on the B2B-connector JB2, pins 9 and 11.

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If VCCIOA or VCCIOC  will be powered through the dedicated pins of external connector J6, then corresponding VCCIO jumpers J10 and J12 should be removed.

Base-board supply-voltage configuration

Refer to the 4 x 5 Module Integration Guide for VCCIO voltage options.

 

Note

Note: The corresponding PL I/O bank supply-voltages of the 4 x 5 SoM to the selectable base-board voltages VCCIOA, VCCIOB and VCCIOC are depending on the mounted 4 x 5 SoM and varying in order of the used model.

Refer to the SoM's schematic for information about the specific pin assignments on module's B2B-connectors regarding the PL I/O bank supply-voltages and to the 4 x 5 Module integration Guide for VCCIO voltage options.

 

Image Removed

Base-board supply-voltages (VCCIOA, VCCIOB, VCCIOC) selection-jumpers.

 

Following table shows how to configure the voltage-levels of base-board supply-voltages VCCIOA, VCCIOB and VCCIOC by jumper, 0-Ohm-resistor or by feeding the supply voltage through connector J6:

...

Jumper-Notification: 'Jx: 1-2, 3' means pins 1 and 2 are connected, 3 is open. 'Jx: 1, 2-3' means pins 2 and 3 are connected, 1 is open.

Only one supply-source is allowed to configure the base-board supply-voltages, either by jumper, by 0-Ohm-resistor or by connector J6. If a supply-voltage is configured by 0-Ohm-resistor or connector J6, then the corresponding configuration-jumper has to be removed. There aren't 0-Ohm-resistors and supply-voltages by connector J6 allowed if the corresponding base-board supply-voltage is configured by jumper. Vice versa jumpers and 0-Ohm-resistors have to be removed if supplying corresponding base-board supply-voltage by connector J6.

Note: If supplying base-board supply-voltages by connector J6, the module's internal 3.3V voltage-level on pins 9 and 11 of B2B-connector JB2 has to be reached stable state.

 

Note
It is recommended to set and measure the PL IO-bank supply-voltages before mounting of TE 4 x 5 module to avoid failures and damages to the functionality of the mounted SoM.
Info
Header J9 exposes the SoM's VBAT-pin to an accessible connector. Please refer to the SoM's documentation regarding the operation conditions of this pin.

Technical Specifications

Absolute Maximum Ratings

...

Parameter

...

Units

...

Supply voltage VIN

...

-0.3

...

V

...

EN6347QI / EN5311QI datasheet.

Note: USB-VBUS = VIN, if enabled.

...

Storage temperature

...

-55

...

+125

...

°C

...

Recommended Operating Conditions

...

Parameter

...

Units

...

Supply Voltage Vin

...

4.75

...

5.25

...

V

...

0

...

+70

...

°C

...

Note
Please check components datasheets for complete list of absolute maximum and recommended operating ratings.

Physical Dimensions

  • Board size:  PCB 100mm ×  64.5mm. Notice that the USB type A socket on the left and the Ethernet RJ-45 jacks on the right are hanging slightly over the edge of the PCB making the total width of the longer side approximately 106mm. Please download the assembly diagram for exact numbers.

  • Mating height of the module with standard connectors: 8mm

  • PCB thickness: 1.65mm

  • Highest parts on the PCB are USB type A socket and the Ethernet RJ-45 jacks, approximately 15mm. Please download the step model for exact numbers.

 All dimensions are given in millimeters.

 

...

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Industrial grade: -40°C to +85°C.

Board operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Weight

115g - Plain baseboard.

13g - VG96 connector.

Revision History

Hardware Revision History

...

Revision

...

Notes

...

PCN

...

02

...

First production revision

...

-

...

-

...

01

...

Prototypes

...

-

...

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Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

Document Change History

...

Date

...

Revision

...

Contributors

...

Description

...

Ali Naseri, Jan Kumann
  • Hardware revision 02 specific changes.

...

2017-01-06

...

v.1Ali Naseri

...

  • initial document to board revision 02
---all

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