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Overview
The Trenz Electronic TEC0850 is an industrial-grade MPSoC SoM integrating a Xilinx Zynq UltraScale+ MPSoC, with 64-bit wide SODIMM DDR4 SDRAM, max. Dual 512 MByte Flash memory for configuration and operation. 24 Gigabit transceivers on PL side and 4 PS side. Powerful switch-mode power supplies for all onboard voltages. A large number of configurable I/Os. 3U form factor.
Board Component Descriptions
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MGT reference clocks are connected to banks 129, 229 and 505. Banks 128 and 130 should share clock from bank 129, banks 230 and 228 from bank 229.
DIP-Switches
S1
| Switch | Description |
|---|---|
| 1 | Boot Mode 0 |
| 2 | Boot Mode 1 |
| 3 | Boot Mode 2 |
| 4 | Boot Mode 3 |
See Zynq UltraScale+ Device Technical Reference Manual page 236 for full boot modes description. Most common modes are
| Boot Mode | SW1:4 | SW1:3 | SW1:2 | SW1:1 |
|---|---|---|---|---|
| JTAG Boot Mode | ON | ON | ON | ON |
| Quad-SPI | ON | ON | ON | OFF |
| SD Card | ON | ON | OFF | OFF |
S2
| Switch | Description |
|---|---|
| 1 | SC JTAGEN |
| 2 | EEPROM WP (Write protect) |
| 3 | FPGA PUDC |
| 4 | SC Switch (Reserved for future use) |
LEDs
| LED | Signal | Chip | Pin | Description |
|---|---|---|---|---|
| Front panel LED 1 (Red) | LED_FP_1 | FPGA U1 | AF15 | PL User defined LED |
| Front panel LED 2 (Green) | LED_FP_2 | FPGA U1 | AG15 | PL User defined LED |
| Front panel LED 3 (Green) | LED_FP_3 | FPGA U1 | AE15 | PL User defined LED |
| Front panel LED 4 (Green) | LED_FP_4 | SC U18 | M4 | Power Good |
Clocking
| draw.io Diagram | ||||||||||||||||||
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