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Initial Delivery State

Storage device nameContentNotes
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Boot Process

Signals, Interfaces and Pins

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Front panel USB-C Interface connected to USB FIFO bridge chip FT601Q. 32-bit FIFO bridge provides a simple high-speed interface to Zynq UltraScale+ PL.

FT601Q SignalFPGA Pin
FIFO_CLK
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See FT600Q-FT601Q IC Datasheet for interface details.

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Tip

To force Linux driver not to use this features add following instructions to device tree file.

&sdhci1 {

no-1-8-v;
disable-wp;
};

RJ45 -Ethernet

cPCIe

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MGT

The TEC0850 board has 30 MGT lines routed to backplane connectors.

BankConnectorLanes
PL 128J4G and J4H4
PL 129J5A and J5B4
PL 130J5C and J5D4
PL 230J4G and J4H4
PL 229J5A and J5B4
PL 228J5C and J5D4
PS 505J1A4

MGT reference clocks are connected to banks 129, 229 and 505. Banks 128 and 130 should share clock from bank 129, banks 230 and 228 from bank 229.


USB Interface

Zynq UltraScale+ USB controller connected to backplane connector J1C via USB PHY chip U11.

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The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

I2C addressChipDescription
0x50U63 24AA128T-I/ST128K Serial EEPROM
0x53U64 24AA025E48T-I/OT2K Serial EEPROM with EUI-48™ or EUI-64™ Node Identity

USB PHY

Gigabit Ethernet PHY

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The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

I2C addressChipDescription
0x69U14 Si5345Clock generator and distributor

Oscillators

Power and Power-On Sequence

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Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Power InputTypical Current

TBD*

Table : Typical power consumption.

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Technical Specifications

Absolute Maximum Ratings

Parameter

MinMax

Units

Reference Document

supply voltage...



V

-

Storage temperature



°C

-

Table : Module absolute maximum ratings.

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
supply voltage...



Operating temperature



Table : Module recommended operating conditions.

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Hardware Revision History

DateRevision

Notes

PCNDocumentation Link
-02current available board revision-TEC0850-02
-

01

First production release

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Table 24: Module hardware revision history

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Table 25: Document change history

Date

Revision

Contributors

Description

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd

Page info
infoTypeCurrent version
dateFormatyyyy-MM-dd
prefixv.
typeFlat


Page info
infoTypeModified by
dateFormatyyyy-MM-dd
typeFlat


  • Initial document

all


Page info
infoTypeModified users
dateFormatyyyy-MM-dd
typeFlat



Disclaimer

Include Page
IN:Legal Notices
IN:Legal Notices

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