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TRM Name always "TE Series Name" +TRM, for example "TE0720 TRM"

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Important General Note:

If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable

Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)

Figure template:

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title	Figure x: Text

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Table template:
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-----------------------------------------------------------------------

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Note for Download Link of the Scroll ignore macro:

Link to the base folder of the module (remove de/ or en/ from the URL): for example:https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0703/

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Download PDF version of this document.

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Table of Contents

Table of Contents

Overview

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Notes :

short description of the PCB
Short Link of "Scroll only" macro:
- Use short link the Wiki Resource page, for example: http://trenz.org/te0720-info
- List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

The Trenz Electronic TEC0850 is an industrial-grade MPSoC SoM integrating a Xilinx Zynq UltraScale+ MPSoC, with 64-bit wide SODIMM DDR4 SDRAM, max. Dual 512 MByte Flash memory for configuration and operation. 24 Gigabit transceivers on PL side and 4 PS side. Powerful switch-mode power supplies for all onboard voltages. A large number of configurable I/Os. 3U form factor.

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Refer to http://trenz.org/tec0850-info for the current online version of this manual and other available documentation.

Key Features

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Notes:

List of key features of the PCB

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Block Diagram

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title	Figure 1: TEC0850-02 block diagram

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draw.io Diagram

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Main Components

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Picture of the PCB (top and bottom side) with labels of important components
Add List below

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title	Figure 2: TEC0850-02 main components

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Initial Delivery State

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title	Table 1: Initial delivery state of programmable devices on the module.

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Storage device name	Content	Notes
..	..	..
OTP Flash area	Empty	Not programmed.

Control Signals

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Overview of Boot Mode, Reset, Enables,

Signals, Interfaces and Pins

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Notes :

For carrier or stand-alone boards use subsection for every connector typ (add designator on description, not on the subsection title), for example:
- SD
- USB
- ETH
- FMC
- ...
For modules which needs carrier us only classes and refer to B2B connector if more than one is used, for example
- JTAG
- UART
- I2C
- MGT
- ...

Subsections...

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Table of Contents

Table of Contents

Overview

The Trenz Electronic TEC0850 is an industrial-grade MPSoC SoM integrating a Xilinx Zynq UltraScale+ MPSoC, with 64-bit wide SODIMM DDR4 SDRAM, max. Dual 512 MByte Flash memory for configuration and operation. 24 Gigabit transceivers on PL side and 4 PS side. Powerful switch-mode power supplies for all onboard voltages. A large number of configurable I/Os. 3U form factor.

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Refer to http://trenz.org/tec0850-info for the current online version of this manual and other available documentation.

Key Features

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Block Diagram

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The workaround with the additional PNG of the diagram is necessary until the bug of the Scroll PDF Exporter, which cuts diagram to two pages, is fixed.


IMPORTANT NOTE: In case of copy and paste the TRM skeleton to a new Wiki page, delete the Draw.IO diagrams and the PNGs, otherwise due to the linkage of the copied diagrams every change in the TRM Skeleton will effect also in the created TRM and vice versa!

See page "Diagram Drawing Guidelines" how to clone an existing diagram as suitable template for the new diagram!

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Main Components

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Initial Delivery State

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Boot Process

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The Zynq UltraScale+ DDRC hard memory controller is wired to the DDR4 SODIMM Socket U3.

Circular Push Pull Connector

PicoBlade Connector

Pin Heater 2,54mm (2x5)

Battery holder

On-board Peripherals

Zynq UltraScale XCZU15EG MPSoC

The TEC0850 board is populated with the Zynq UltraScale+ XCZU15EG-1FFVB1156E MPSoC.

Main IO interfaces are shown on the image below.

PS MIO Configuration

...

the DDR4 SODIMM Socket U3.

Circular Push Pull Connector

PicoBlade Connector

Pin Heater 2,54mm (2x5)

Battery holder

On-board Peripherals

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Notes :

add subsection for every component which is important for design, for example:
- Ethernet PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs

Subsections...

Zynq UltraScale XCZU15EG MPSoC

The TEC0850 board is populated with the Zynq UltraScale+ XCZU15EG-1FFVB1156E MPSoC.

Main IO interfaces are shown on the image below.

PS MIO Configuration

MIO	Interface
MIO 0...12	QSPI Flash Memory
MIO 20...21	I2C 1
MIO 22...23	UART 0
MIO 26...37	GEM 0
MIO 46...51	SD 1
MIO 52...63	USB 0
MIO 64...75	USB 1
MIO 76...77	MDIO 0

Table 10: Default MIO Configuration

MAX10 System Controller

System controller chip is Intel MAX10 10M08SAU169C8G Chip with board control firmware.

Programmable Clock Generators

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title	Figure 2: TEF1001-02 main components

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I2C

The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

I2C address	Chip	Description
0x69	U14 Si5345	Clock generator and distributor

Oscillators

FTDIs

FT2232H

FT601Q-B-T

Quad-SPI Flash Memory

Board has two N25Q512A11G1240E connected in a dual parallel mode.

EEPROMs

I2C

The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

I2C address	Chip	Description
0x50	U63 24AA128T-I/ST	128K Serial EEPROM
0x53	U64 24AA025E48T-I/OT	2K Serial EEPROM with EUI-48™ or EUI-64™ Node Identity

USB PHY

Gigabit Ethernet PHY

Board has Marvell Alaska 88E1512 Ethernet PHY which use MDIO address 1.

8Bit DACs

Board has 4 8-bit parallel Texas Instruments THS5641 DACs with up to 100 MSPS Update Rate.

DIP-Switches

S1

Switch	Description
1	Boot Mode 0
2	Boot Mode 1
3	Boot Mode 2
4	Boot Mode 3

See Zynq UltraScale+ Device Technical Reference Manual page 236 for full boot modes description. Most common modes are

Boot Mode	SW1:4	SW1:3	SW1:2	SW1:1
JTAG Boot Mode	ON	ON	ON	ON
Quad-SPI	ON	ON	ON	OFF
SD Card	ON	ON	OFF	OFF

S2

Switch	Description
1	SC JTAGEN
2	EEPROM WP (Write protect)
3	FPGA PUDC
4	SC Switch (Reserved for future use)

Buttons

LEDs

LED	Signal	Chip	Pin	Description
Front panel LED 1 (Red)	LED_FP_1	FPGA U1	AF15	PL User defined LED
Front panel LED 2 (Green)	LED_FP_2	FPGA U1	AG15	PL User defined LED
Front panel LED 3 (Green)	LED_FP_3	FPGA U1	AE15	PL User defined LED
Front panel LED 4 (Green)	LED_FP_4	SC U18	M4	Power Good

Power and Power-On Sequence

Power Consumption

The maximum power consumption of a module mainly depends on the design running on the FPGA.

Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Power Input	Typical Current
	TBD*

Table : Typical power consumption.

Power Distribution Dependencies

Table 10: Default MIO Configuration

MAX10 System Controller

System controller chip is Intel MAX10 10M08SAU169C8G Chip with board control firmware.

Programmable Clock Generators

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anchor	Figure_2
title	Figure 2: TEF1001-02 main components

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I2C

The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

...

Oscillators

FTDIs

FT2232H

FT601Q-B-T

Quad-SPI Flash Memory

Board has two N25Q512A11G1240E connected in a dual parallel mode.

EEPROMs

I2C

The onboard I2C bus is connected to MIO 20...21 pins. Devices on the bus shown in the table below.

...

USB PHY

Gigabit Ethernet PHY

Board has Marvell Alaska 88E1512 Ethernet PHY which use MDIO address 1.

8Bit DACs

Board has 4 8-bit parallel Texas Instruments THS5641 DACs with up to 100 MSPS Update Rate.

DIP-Switches

S1

...

See Zynq UltraScale+ Device Technical Reference Manual page 236 for full boot modes description. Most common modes are

...

S2

...

Buttons

LEDs

...

Power and Power-On Sequence

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Power Consumption

The maximum power consumption of a module mainly depends on the design running on the FPGA.

Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

...

Table : Typical power consumption.

Power Distribution Dependencies

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title	Figure 3: Power Distribution

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title Figure 43: Power -On Sequence DiagramDistribution
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Power-On Sequence

only

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title

Power Rails

Bank Voltages

Variants Currently In Production

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anchor	Figure_4
title	Figure 4: Power-On Sequence Diagram

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Voltage Monitor Circuit

Power Rails

Bank Voltages

Technical Specifications

Absolute Maximum Ratings

Scroll Title

anchor	Table_x
title	Table x: Module absolute maximum ratings.

Parameter	Min	Max	Units	Reference Document

Recommended Operating Conditions

Scroll Title

anchor	Table_x
title	Table x: Module absolute maximum ratings.

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Technical Specifications

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Parameter	Min	Max	Units	Reference Document

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supply voltage...

...

V

...

Storage temperature

...

°C

...

Table : Module absolute maximum ratings.

Recommended Operating Conditions

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Table : Module recommended operating conditions.

Physical Dimensions

Board size: ...mm × ...mm. Please download the assembly diagram for exact numbers
PCB thickness: ca. ...mm
The board meets the ... Specification...

All dimensions are given in millimeters.

...

Physical Dimensions

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title	Figure x: Physical dimensions drawing

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Variants Currently In Production

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Set correct link to the shop page overview table of the product on English and German, if not available, set
- https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/
- https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/

Trenz shop TE0xxx overview page
English page	German page

...

Revision History

Hardware Revision History

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Scroll Title

...

anchor

...

Table_x

...

01

...

First production release

...

Table 24: Module hardware revision history

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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title	Figure 6: Module hardware revision number

title	Table x: Module absolute maximum ratings.

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repeatTableHeaders	default
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Date	Revision	Notes	PCN	Documentation Link
-	01	Prototypes

Document Change History

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Note this list must be only updated, if the document is online on public doc!
It's semi automatically, so do following
- Add new row below first
- Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template
- Metadata is only used of compatibility of older exports

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Date	Revision	Constributor

Document Change History

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2.Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number
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Table 25: Document change history

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Date

...

Revision

...

Description

Page info

	modified-date
	modified-date
dateFormat	yyyy-MM-dd

Page info

infoType	Current version
dateFormat	yyyy-MM-dd
prefix	v.
type	Flat

Page info

infoType	Modified by
dateFormat	yyyy-MM-dd
type	Flat

...

change list

--

all

Page info

infoType	Modified users
dateFormat	yyyy-MM-dd
type	Flat

--

Disclaimer

Include Page

	IN:Legal Notices
	IN:Legal Notices

02 Sept 2017

Trenz Electronic Documentation

Page History

Versions Compared

Old Version 32

New Version 33

Key

Overview

Key Features

Block Diagram

Main Components

Initial Delivery State

Control Signals

Signals, Interfaces and Pins

Subsections...

Overview

Key Features

Block Diagram

Main Components

Initial Delivery State

Boot Process

Circular Push Pull Connector

PicoBlade Connector

Pin Heater 2,54mm (2x5)

Battery holder

On-board Peripherals

Zynq UltraScale XCZU15EG MPSoC

Circular Push Pull Connector

PicoBlade Connector

Pin Heater 2,54mm (2x5)

Battery holder

On-board Peripherals

Subsections...

Zynq UltraScale XCZU15EG MPSoC

MAX10 System Controller

Programmable Clock Generators

Oscillators

FTDIs

Quad-SPI Flash Memory

EEPROMs

USB PHY

Gigabit Ethernet PHY

8Bit DACs

DIP-Switches

Buttons

LEDs

Power and Power-On Sequence

Power Consumption

Power Distribution Dependencies

MAX10 System Controller

Programmable Clock Generators

Oscillators

FTDIs

Quad-SPI Flash Memory

EEPROMs

USB PHY

Gigabit Ethernet PHY

8Bit DACs

DIP-Switches

Buttons

LEDs

Power and Power-On Sequence

Power Consumption

Power Distribution Dependencies

Power-On Sequence

Power Rails

Bank Voltages

Variants Currently In Production

Voltage Monitor Circuit

Power Rails

Bank Voltages

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Technical Specifications

Recommended Operating Conditions

Physical Dimensions

Physical Dimensions

Variants Currently In Production

Revision History

Hardware Revision History