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Overview

The Trenz Electronic TE0715 is a System on Module (SoM) based on AMD Zynq-7000 SoC with a Quad GTP transceiver, DDR3 SDRAM, Flash memory, Gigabit Ethernet PHY, a USB 2.0 PHY and powerful switching-mode power supplies for all on-board voltages. A large number of configurable IOs is provided via rugged high-speed stacking strips. All Trenz Electronic SoMs in the 4 x 5 cm form factor are mechanically compatible.

Refer to http://trenz.org/te0715-info for the current online version of this manual and other available documentation.

Key Features

  • SoC/FPGA

    • AMD Zynq 7000 SoC 1) : XC7Z012S / XC7Z015 / XC7Z030
    • Speed-grade1) :               -1 / -2 / -3 
    • Temperature Range 1) :   Commercial / Extended / Industrial
    • Package 2) :                     CLG485 / SBG485
  • RAM/Storage

    • DDR3 SDRAM 1 GByte 3)

    • QSPI Flash 32 Mbyte (with XiP support) 3)
    • EEPROM with MAC address and 192 Byte usable storage
  • On Board

    • System Controller (SC)

    • 10/100/1000 Mbit Ethernet PHY
    • USB 2.0 ULPI PHY
    • Real time clock (RTC) with optional battery backed SRAM support
    • Programmable clock generator
    • 2x LEDs for SoM and SoC configuration status
    • 1x LED user configurable
  • Interface

    • 3 x B2B Connector (LSHM) for Trenz 4 x 5 SoM socket
      • PS:    14x MIOs
      • HR:   48x IOs / 24x DIFF
      • MGT:  4x GTP
      • SoC variants XC7Z012S / XC7Z015 4)
        • HR: 84x IOs / 23x DIFF + 2x SE
      • SoC variant XC7Z030 4)
        • HP: 84x IOs  / 41x DIFF + 2x SE
  • Power

    • System management and power sequencing
    • Voltage monitoring for all rails
    • On-board DCDC converters
  • Dimension

    • 50 mm × 40 mm

  • Notes
    1) Available as assembly variant or upon request.
    2) Sockets CLG484 and SBG484 are footprint-compatible.
    3)
    Other sizes/devices, which are pin/package-compatible, upon request.
    4) IO type allocation differs with SoC variant.


Block Diagram


TE0715 block diagram

Main Components

TE0715 main components
  1. AMD Zynq-7000 SoC, U5
  2. DDR3L SDRAM, U12, U13
  3. QSPI Flash, U14
  4. System Controller CPLD, U26
  5. Programmable Clock Generator , U10
  6. 10/100/1000 Mbit Ethernet PHY, U7
  7. USB 2.0 ULPI PHY, U6
  8. RTC with battery backed SRAM, U16
  9. B2B connector Samtec Razor Beam™ LSHM, JM1, JM2, JM3
  10. LED green, D2 (Boot DONE), D4
  11. LED red (SC), D3

Initial Delivery State

Storage device name

Content

Notes

System Controller, U26

Firmware

Visit TE0715 CPLD Firmware / TE0715 CPLD for more information.

QSPI Flash, U14

Not programmed


Programmable Clock Generator, U10

Configuration
EEPROM, U19Not programmedContains write protected Unique Node ID / MAC.
Initial delivery state of programmable devices on the module

Programmable Clock Generator

The programmable Clock Generator (Si5338A) is used to generate four different clocks from oscillator U18 (25 MHz) connected to pin IN3. The Si5338 can alternatively be clocked using pins IN1 and IN2 which are connected to B2B connector JM3 (CLKIN2) or by IN5 from Ethernet PHY U7 (125 MHz).

The Si5338 output frequency to the FPGA clocks can be programmed . An I2C bus is physically connecting the FPGA (master) and clock generator (slave). The I2C logic needs to be created in the FPGA to use this capability. See the reference design section for more information.

TE0715 clock generator


CLK Output I Net Name I Device.Pin

Default Frequency [MHz]

IO Standard

Notes
CLK0A/B--Not used/connected.
CLK1A/B--Not used/connected.
CLK2A/B | CLK2_P/N / MGT_CLK1_P/N | U5G.U5/V5

125

LVDS18

GTP transceiver clock.
CLK3A | FCLK125 | U5B.K2

50

CMOS18

DDR interface

CLK3B

-

-

Not used/connected.

Clock Generator output configuration

I2C Interface

The on-board I2C devices are connected to the Zynq SoC bus master at IO bank 501. As bank 501 is fixed to 1.8V, this requires a voltage-level translator for the 3.3V I2C slave devices. Table below lists I2C slave device addresses and functions:

Device

DesignatorI2C AddressNotes

24AA025E48

Serial EEPROMs with EUI-48™ node identity.

U190x50

ISL12020M

Low-power RTC with battery backed SRAM.

U160x6F

ISL12020M

Battery backed SRAM integrated into RTC.

U160x57

SI5338A

Programmable quad clock generator.

U100x70
I2C device addreses


Signals, Interfaces and Pins

Connectors

Connector Type

Designator

Interface

IO count

Notes

B2BJM1IO48 SE / 24 DIFF
B2BJM1IO8 SE / 4 DIFF
B2BJM1IO6 SE / 4 DIFF
B2BJM1 ETH MDI8
B2BJM2IO48 SE / 24 DIFF
B2BJM2IO18 SE / 9 DIFF
B2BJM2IO2 SE
B2BJM2JTAG4
B2BJM3IO16 SE / 8 DIFF
B2BJM3MGT GTP4
B2BJM3Clock in MGT GTP2
B2BJM3Clock in2
B2BJM3USB OTG3
B2BJM3ETH SGMII4
Board Connectors


Test Points

Test Point

Signal

Notes

TP1

VIN

TP2

DDR_PWR

TP3

1.8V

TP4

3.3V

TP5

VTT

TP6

VTTREF

TP7

3.3VIN

TP8

1.2V_MGT

TP9

1V

TP10

GND

TP11

GND

TP12

GND

TP14

PG_ALL

TP15

PS-CLK
TP18VCCIO34
TP19VCCIO35
TP20PS-POR-B


Test Points Information

On-board Peripherals

Chip/Interface

Designator

Connected To

Notes

SoC

U5
  • SC, U26
  • QSPI Flash, U14
  • LED, D2, D4
  • OSC, U11
  • B2B Connector, JM1, JM2, JM3
  • I2C

DDR3 RAM

U12/U13
  • SoC, U5

QSPI Flash

U14
  • SoC, U5
  • SC, U26

System Controller

U26
  • SoC, U5
  • QSPI Flash, U14
  • LED, D3
  • B2B Connector, JM1, JM2
  • I2C
  • Voltage monitor, U25

Visit TE0715 CPLD Firmware / TE0715 CPLD for further information / firmware description.

Ethernet PHY

U7
  • SoC, U5
  • Clock Generator, U10
  • OSC, U9
  • B2B Connector, JM1, JM3

USB 2.0 PHY

U6
  • SoC, U5
  • OSC, U15
  • B2B Connector, JM3

Voltage level translator

U20
  • SoC, U5
  • I2C

Clock Generator

U10
  • SoC, U5
  • OSC, U18
  • I2C
  • B2B Connector, JM3

Visit chapter Initial Delivery State / Programmable Clock Generator for further information.

RTC

U16
  • SoC, U5
  • I2C
  • B2B Connector, JM1

EEPROM

U19
  • I2C
Contains unique Node Identity / MAC.

Oscillator

U9
  • Ethernet PHY, U7
25 MHz
OscillatorU11
  • SoC, U5
33.3 MHz
OscillatorU15
  • USB 2.0 PHY, U6
52 MHz
OscillatorU18
  • Clock Generator U10
25 MHz
On board peripherals

Configuration and System Control Signals

Signal Name

Connector.Pin

Direction1)

Description

EN1JM1.28Signal dependent

SoM power enable or SC JTAG TDI. 2)

PGOODJM1.30Signal dependent

Power good signal, additional boot mode pin or SC JTAG TDO. 2)

Active high when all on-module power supplies are working properly.

MODEJM1.32Signal dependent

Sets the SoM boot source/mode or functions as SC JTAG TCL. 2)

NOSEQJM1.7Signal dependent

Can be used as IO signal, accessible via SoC I2C or as SC JTAG TMS. 2)

JTAGENJM1.89IN

Enables SC JTAG port, when high.

RESINJM2.18IN

Reset signal to the SoM.

VBUS_V_EN

USB_VBUS

JM3.53

JM3.55

OUT

IN

USB OTG VBus enable.

Voltage state signal to SoM.

TDIJM2.95IN

SoC JTAG TDI.

TDOJM2.97OUT

SoC JTAG TDO.

TCKJM2.99IN

SoC JTAG TCK.

TMSJM2.93IN

SoC JTAG TMS.

MIO14

MIO15

JM1.92

JM1.87

Signal dependent

SoC UART.

VCCIO13JM1.9 / JM1.11INSoC IO Bank supply from carrier
VCCIO34JM2.5IN

SoC IO Bank supply from carrier

VCCIO35JM2.7/JM2.9INSoC IO Bank supply from carrier

1) Direction:

    • IN: Input from the point of view of this board.

    • OUT: Output from the point of view of this board.

    • Signal dependent: Signal can have different functions and/or directions, or is part of a bus where no differentiation is made.

2) When JTAGEN is high, the signal works as part of a JTAG connection to program or update the System Controller.

Controller signal.

Power and Power-On Sequence

Power Rails

Power Rail Name/ Schematic Name

Connector.Pin

Direction1)

Notes

3.3VINJM1.13 / JM1.15IN
VINJM1.1 / JM1.3 / JM1.5 / JM2.2 / JM2.4 / JM2.6 / JM2.8IN
VBAT_INJM1.79IN
VCCIO13JM1.9 / JM1.11IN
VCCIO34JM2.5IN
VCCIO35JM2.7 / JM2.9IN
3.3V / VREF_JTAGJM2.91OUT
1.8VJM1.39OUT
DDR_PWRJM2.19OUT

1) Direction:

    • IN: Input from the point of view of this board.

    • OUT: Output from the point of view of this board.

Module power rails.

Recommended Power up Sequencing


Sequence

Net name

Recommended Voltage Range

Pull-up/down

Description

Notes

0---

Configuration SoM / Carrier signal setup.

See Configuration and System Control Signals.

13.3VIN3.3 V (± 5 %)-Main Power supply. Supplies System Controller directly.


2VIN3.3 V (± 5 %)-Main Power supply.


3
EN1
3.3 V (± 5 %)-Enable SoM.


4

PGOOD

3.3 V (± 5 %) -SoM power good signal.

All SoM power sources are available.

6

VCCIO13
VCCIO34
VCCIO35

--Enable FPGA bank IO supply voltages.


Refer to Trenz 4 x 5 SoM Integration Guide, FAQ - PCBDesign, AMD data sheet DS187 (for XC7Z012S / XC7Z015) or DS191 (for XC7Z030) for more information.

Baseboard Design Hints

Board to Board Connectors

These connectors are hermaphroditic. Odd pin numbers on the module are connected to even pin numbers on the baseboard and vice versa.

4 x 5 modules use two or three Samtec Razor Beam LSHM connectors on the bottom side.

  • 2 x REF-189016-02 (compatible to LSHM-150-04.0-L-DV-A-S-K-TR), (100 pins, "50" per row)
  • 1 x REF-189017-02 (compatible to LSHM-130-04.0-L-DV-A-S-K-TR), (60 pins, "30" per row) (depending on module)
Connector Mating height

When using the same type on baseboard, the mating height is 8mm. Other mating heights are possible by using connectors with a different height

Order numberConnector on baseboardcompatible toMating height
23836REF-189016-01LSHM-150-02.5-L-DV-A-S-K-TR6.5 mm

LSHM-150-03.0-L-DV-A-S-K-TRLSHM-150-03.0-L-DV-A-S-K-TR7.0 mm
23838REF-189016-02LSHM-150-04.0-L-DV-A-S-K-TR8.0 mm

LSHM-150-06.0-L-DV-A-S-K-TRLSHM-150-06.0-L-DV-A-S-K-TR10.0mm
26125REF-189017-01LSHM-130-02.5-L-DV-A-S-K-TR6.5 mm

LSHM-130-03.0-L-DV-A-S-K-TRLSHM-130-03.0-L-DV-A-S-K-TR7.0 mm
24903 REF-189017-02LSHM-130-04.0-L-DV-A-S-K-TR8.0 mm

LSHM-130-06.0-L-DV-A-S-K-TRLSHM-130-06.0-L-DV-A-S-K-TR10.0mm
Connectors.

The module can be manufactured using other connectors upon request.

Connector Speed Ratings

The LSHM connector speed rating depends on the stacking height; please see the following table:

Stacking heightSpeed rating
12 mm, Single-Ended7.5 GHz / 15 Gbps
12 mm, Differential

6.5 GHz / 13 Gbps

5 mm, Single-Ended11.5 GHz / 23 Gbps
5 mm, Differential7.0 GHz / 14 Gbps
Speed rating.
Current Rating

Current rating of  Samtec Razor Beam™ LSHM B2B connectors is 2.0A per pin (2 adjacent pins powered).

Connector Mechanical Ratings
  • Shock: 100G, 6 ms Sine
  • Vibration: 7.5G random, 2 hours per axis, 3 axes total


Manufacturer Documentation

  File Modified
PDF File hsc-report_lshm-lshm-05mm_web.pdf High speed test report Apr 07, 2016 by Thorsten Trenz
PDF File lshm_dv.pdf LSHM catalog page Apr 07, 2016 by Thorsten Trenz
PDF File LSHM-1XX-XX.X-X-DV-A-X-X-TR-FOOTPRINT(1).pdf Recommended layout and stencil drawing Apr 07, 2016 by Thorsten Trenz
PDF File LSHM-1XX-XX.X-XX-DV-A-X-X-TR-MKT.pdf Technical drawing Apr 07, 2016 by Thorsten Trenz
PDF File REF-189016-01.pdf Technical Drawing Apr 07, 2016 by Thorsten Trenz
PDF File REF-189016-02.pdf Technical Drawing Apr 07, 2016 by Thorsten Trenz
PDF File REF-189017-01.pdf Technical Drawing Apr 07, 2016 by Thorsten Trenz
PDF File REF-189017-02.pdf Technical Drawing Apr 07, 2016 by Thorsten Trenz
PDF File TC0923--2523_report_Rev_2_qua.pdf Design qualification test report Apr 07, 2016 by Thorsten Trenz
PDF File tc0929--2611_qua(1).pdf Shock and vibration report Apr 07, 2016 by Thorsten Trenz



Technical Specifications

This TRM is generic for all variants.

  • The voltage ranges are generally the same across variants (exceptions are possible, depending on custom requests).
  • The temperature range can differ depending on the assembly version.
  • The combination of a carrier and a SoM might have different requirements.

Module variants are described here: Article Number Information. Please contact us for options.

Absolute Maximum Ratings *)

Power Rail Name/ Schematic Name

Description

Min

Max

Unit

3.3VIN

Supply power from carrier. Powers SC directly.

–0.53.6

V

VIN

Supply power from carrier.

-0.36

V

VBAT_IN

SoC, RTC/Volatile Memory supply.

-0.3

6

V

VCCIO13

IO Bank supply for SoM.

–0.5

3.6

V

VCCIO34

IO Bank supply for SoM.

–0.5

–0.5

3.6 1)

2.0 2)

V

V

VCCIO35

IO Bank supply for SoM.

–0.5

–0.5

3.6 1)

2.0 2)

V

V

1) The SoC's XC7Z012S / XC7Z015 feature only HR Banks, which are limited to a maximum of 3.6 V.
2) The SoC's XC7Z030 IO Banks 34 and 35 are HP Banks, which are limited to a maximum of 2 V.

Absolute maximum ratings

*) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these
   or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

Temperature range

Trenz Electronic classifies modules into temperature range categories by subsumption of its component data (PCB, ICs, connectors, passive components). The temperature ranges are values for ambient air temperature and do not reflect the junction temperature of individual components.

The categories are:

    Modules with commercial (C) temperature grade are equipped with components that cover at least the ambient temperature range of 0 °C to 70 °C.
    Modules with extended (E) temperature grade are equipped with components that cover at least the ambient temperature range of 0 °C to 85 °C.
    Modules with industrial (I) temperature grade are equipped with components that cover at least the ambient temperature range of -40 °C to 85 °C.

These categories do not take into account the entire custom system consisting of:

    Customer SoC design. The allowed main SoC temperature range is specified from the vendor by junction temperature using corresponding classes (C, E, I). See vendor documentation.
    Cooling solution, active and or passive cooling.
    Climate or environmental conditions besides ambient temperature range.
    Module orientation, neighbouring assemblies, neither other heat sources nor the SoC as heat source to other components.

Classification of the module can be locked up here: Article Number Information i.e.: TExxxx-xx-xx'I'xx, the 'I' indicates that all components are at least in Industrial temperature class.

The temperature of individual components should not exceed the specified range due to self-heating or heating by adjacent components. The actual operating temperature range will depend on the customer design, usage, environment and cooling solution. Consult Cooling Solutions for more information.

Voltage rails

The following table aims to be generic for all variants. The voltage ranges are consistent across assembly variants, but exceptions are possible (custom request).

Parameter

Min

Max

Units

Reference Document

3.3VIN3.153.45

V


VIN3.1355.25

V


VBAT_IN2.913.09

V


VCCIO13

1.164

3.399

V


VCCIO34

1.164

1.164

3.399 1)

1.854 2)

V

V


VCCIO35

1.164

1.164

3.399 1)

1.854 2)

V

V


1) The SoC's XC7Z012S / XC7Z015 feature only HR IO Banks, which are limited to a maximum of 3.3 V.
2) The SoC XC7Z030 IO Banks 34 and 35 are HP IO Banks, which are limited to a maximum of 1.8 V.

Recommended operating conditions.

Physical Dimensions

  • Module size: 50 mm × 40 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 8 mm.

  • PCB thickness: 1.6 mm ±10 %.

All dimensions are shown in millimeters.

Physical Dimension

Currently Offered Variants 

Trenz shop TE0715 overview page*

English page

German page

*) Module article name encoding table: 7 Series Zynq-7000 based modules

Trenz Electronic Shop Overview

Revision History

Hardware Revision History

The hardware revision number is located on the PCB next to the module identifier, separated by a dash.



Board hardware revision number.


Date

Revision

Changes

Documentation Link

2022-0305

1. SI5338 OTP content update

2. Revised power supply circuit: replaced obsolete parts U1, U2, U3,U8,U24, Q1.
3. Added power supervisor BD39040MUF (U25). Signal PG_DDR_PWR renamed to PG_All (U25) and connected to system controller (U26.27).
4. Signal MIO8 (U5.E18) connected to system controller (U26.8).
5. Power supervisor U23 connected to 3.3VIN power rail (was 3.3V). Added protection diode D5 to U23.3 (#MR input) 
6. Revised quantity of decoupling capacitors regarding Xilinx Spec (UG933, v1.13.1).
7. Remove GND connection from "RSVDGND" (U5.G12, Xilinx Spec UG865 v1.9).
8. Auxiliary information has been added on Overview, Power_diagram, Legal_Notices pages.
9. PCB: Revised layout of power supplies.
10. PCB: Revised layout of Samtec B2B signals. The length of the tracks has been changed. Pinout of Samtec B2B connectors not affected.
11. SCH & PCB: Full LIB update.

12. Replace EN6347QI (U1) by MPM3840GQV-Z. 
13. Replace TPS82085SIL (U2, U3, U8, U24) by MPM3834CGPA. 
14. Replace TPS27082LDDCR (Q1) by MP5077GG-Z. 
15. Add power supervisor BD39040MUF (U25). 
16. Add protection diode D5 to U23.3 (#MR input). 
17. Connect power supervisor U23 to 3.3VIN power rail (was 3.3V). 
18. Change voltage divider resistors (R56, R58) to set the threshold for U23. 
19. Change net name "PG_DDR_PWR" to "PG_All" and connect BD39040MUF "PG_All" - signal U25.15 to system controller U26.27 with pull-up resistor R67. 
20. Connect MIO8-Signal "SPE_SCK_FB/VCFG1" (U5.E18) to system controller (U26.8). 
21. Connect net "PS-POR-B" via resistor R75 net name "RST" to system controller (U26.9). 
22. Change pull-down/floating status for U5.T16 and U5.U16 for revision indicator. 
23. Remove GND connection from FPGA "RSVDGND" pin (U5.G12). 
24. Replace BKP0603HS121-T (L1, L2, L3, L4, L5, L6, L7, L8, L9, L11) by MPZ0603S121HT000. 
25. Change decoupling capacitor (C9, C30) from net "1.8V" at pin U5 bank 501 to net "1V". 
26. Remove decoupling capacitor (C12) for net "1.8V" at pin U5 bank 501. 
27. Add decoupling capacitor (C50, C51, C88, C89, C108, C118) for net "1V". 
28. Change decoupling capacitor (C21, C144) for VCCPLL. 
29. Add/Change decoupling capacitor (C107, C128) for VCCAUX and VCCPAUX. 
30. Add decoupling capacitor (C128) for AVDD3. 
31. Change decoupling capacitor (C136, C142, C139, C145) for net DDR_PWR. 
32. Add/Change decoupling capacitor (C50, C51, C86, C88, C89, C108, C118) for VCCBRAM. 
33. Add input capacitor (C153, C154) for DCDC U4. 
34. Change resistor (R21) physical size. 
35. LIB update. 
36. Change PCB layout of Samtec B2B signals.
37. Change schematic documentation.

REV05

PCN

PCN

2016-0704

1. Change DDR3 RAM (U12, U13) from IM4G16D3FABG-125I to IS43TR16256BL-125KBLI.
2. Clock Revision Change (U11, U15) SiT8008AI-... to SiT8008BI-... .
3. Set S/N to not fitted.

4. Replaced Level translator LFXLA101L6X (U21) by FXLH1T45L6X.

5. Fixed Xilinx AR# 65240.
6. Added Test Points.
7. Changed U9 supply to 1.8V.
8. Reworked Power Supply.
9. Changed DDR3 RAM to DDR3L RAM.

REV04

PCN

PCN

PCN

2015-0703

REV03

2015-0402

REV02

2015-0201


Hardware Revision History

Document Change History

Date

Revision

Contributors

Description

  • Configuration and System Control Signals - VBus signal B2B fixed

2026-02-19

v.96

Kilian Jahn

  • Updated to TRM Template 4.3

2024-06-19

v.90Waldemar Hanemann
  • Updated Key features: DCDC current rating
  • Added revision 5 in Hardware revision history
2021-06-21v.87John Hartfiel
  • Bugfix Link to PDF download
2018-07-06v.86John Hartfiel
  • Link to shop production list
  • Change normal Bank power note to important note

2017-11-14

v.85John Hartfiel
  • Replace B2B connector section
2017-09-10v.82Jan Kumann
  • Document template revision added.
  • Revised block diagram with new I2C part.
  • Power distribution diagram added.
  • Power-on sequence diagram added.
  • Sections rearranged, some missing ones added.
  • Weight section removed.
2017-06-07

v.64

Jan Kumann
  • Minor formatting.
2017-03-02

v.59

Thorsten Trenz
  • Corrected boot mode table.
2017-02-10

v.58

Thorsten Trenz
  • Corrected PLL initial delivery state.
2017-01-25
v.55


Jan Kumann
  • New block diagram.
2017-01-14

v.50

Jan Kumann
  • Product revision 04 images added.
  • Formatting changes and small corrections.
2016-11-15

v.45

Thorsten Trenz
  • Added B2B Connector section.
2016-10-18
v.40

Ali Naseri

  • Added table "power rails".
2016-06-28
v.38


Thorsten Trenz, Emmanuel Vassilakis, Jan Kumann

  • New overall document layout with shorter table of contents.
  • Revision 01 PCB pictures replaced with the revision 03 ones.
  • Fixed link to Master Pin-out Table.
  • New default MIO mapping table design.
  • Revised Power-on section.
  • Added links to related Xilinx online documents.
  • Physical dimensions pictures revised.
  • Revision number picture with explanation added.
2016-04-27v.33

Thorsten Trenz, Emmanuel Vassilakis

  • Added table "Recommended Operating Conditions".
  • Storage Temperature edited.
2016-03-31v.10

Philipp Bernhardt, Antti Lukats

  • Initial version.

Table 22: Document change history.

Disclaimer

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The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

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In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Product Disclaimer

Products (incl. Software and Firmware) are exclusively designed, manufactured, and distributed for industrial applications. They are not intended, authorized, or certified for use in critical safety applications, medical devices, aerospace, nuclear, life-support, traffic-control, military, or other environments where malfunction or failure could result in personal injury, death, or significant property or environmental damage.

Trenz Electronic GmbH (“Manufacturer”) excludes any liability for inappropriate use in such contexts. The Customer bears all responsibility for verifying suitability and compliance with applicable regulations when deploying in any critical-use scenario. The Customer also agrees to indemnify and hold harmless the Manufacturer from any third-party claims or liabilities arising from such use.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.



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